From: Pan Li Date: Sat, 12 Jul 2025 14:26:32 +0000 (+0800) Subject: RISC-V: Refine the scalar SAT_* test cases X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2b19a1ccbc03cd41038d1e166f28e271fbe88789;p=thirdparty%2Fgcc.git RISC-V: Refine the scalar SAT_* test cases Per previous discuss with Jeff, we don't do complicated asm check like scalar saturation alu. It is somehow not easy to maintain, as well as fragile. Thus, we remove these function-body check, and introduce the jmp label asm check instead.The code-gen of SAT_* will never have a jmp, and the other run test will make sure the correctness of SAT_* code-gen. The below test suites are passed for this patch series. * The rv64gcv fully regression test. The below failed test cases are resolved: FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Oz check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Os check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O3 check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Ofast check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O2 check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 gcc/testsuite/ChangeLog: * gcc.target/riscv/sat/sat_s_add-1-i16.c: Remove function-body check and add no jmp label asm check. * gcc.target/riscv/sat/sat_s_add-1-i32.c: * gcc.target/riscv/sat/sat_s_add-1-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-1-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u8.c: Ditto. Signed-off-by: Pan Li --- diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c index 55890d8487c..50f0f1f0631 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c index 29e843f3c7b..dc658173635 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c index 7f29d21d103..9995bc7b9cf 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c index 3ad7bdd9164..caf745a6f9e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c index 07d31015c13..f19187dce49 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c index 81b85b4ab6e..88dc37d42f7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c index 9a3d83e8edc..891d6cfaace 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c index ecc9a0f733c..a07172bea80 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c index 7e933856e71..50771988725 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c index 09bf497cc10..07af4e1a75b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c index 5652cdb9aea..7c4be5b1926 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c index 0eb0c849649..fc0e1b7bc38 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c index 9dfdb9eba9a..4c0b38a87c3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c index 74df576b531..45b4638d8dd 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c index 5937699766f..294eb52b290 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c index af850d0d155..143fa3ccd4c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c index 2e23af5d86b..414cb6188c3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c @@ -1,57 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int16_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*-7 -** xori\s+[atx][0-9]+,\s*a0,\s*-7 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX) - -/* -** sat_s_add_imm_int16_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c index e63211ffc1d..adf5b39ad32 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c @@ -1,54 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int32_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*a0,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX) -/* -** sat_s_add_imm_int32_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c index 3843b711da8..b88e064a426 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c @@ -1,48 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int64_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX) -/* -** sat_s_add_imm_int64_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** slti\s+[atx][0-9]+,\s*a0,\s*0 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c index ceae1ea2f36..0e337efd1fa 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c @@ -1,49 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int8_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*a0,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX) -/* -** sat_s_add_imm_int8_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*56 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*a5 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c index 14c5d511aab..f217fe1863d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c @@ -1,57 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int16_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*-7 -** xori\s+[atx][0-9]+,\s*a0,\s*-7 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX) -/* -** sat_s_add_imm_int16_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c index ecd757d903f..4025b5ae534 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c @@ -1,54 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int32_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*a0,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX) -/* -** sat_s_add_imm_int32_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c index 07d798f7fd0..3fc2514e6ab 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c @@ -1,48 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int64_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX) -/* -** sat_s_add_imm_int64_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** slti\s+[atx][0-9]+,\s*a0,\s*0 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c index 27342119423..a0e15cfbe4c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c @@ -1,49 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int8_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*a0,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX) -/* -** sat_s_add_imm_int8_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*a4 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c index c244eb40947..734e8bec036 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c index 9d8245d4997..3aa4c583c2c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c index 929de162d57..4c0caa14b96 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c index a918d5ca0f4..6c1441b2e48 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c index 2da1c0d3501..57a43276bf1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c index 20b28e75f2d..28582fbaa12 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c index a5401983e7d..130ca46fc55 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c index c54057d14c9..cd407b2f71a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c index 469a11394bd..748d61a4f20 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c index b2c03f682a2..be7869ae633 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c index e3fe6c78ca6..d16a7fbc7e8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c index 150cde1bf66..14a24544243 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c index 26d159ca0b5..614d1ec1de1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c index d576c38cf32..2f52bd70f29 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c index f42ffea5f9f..cef478b2861 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c index ee510a6340b..3ed7790ea2f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c index 451a3754c4f..6d1fbc4fa5a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_1: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c index 2aafb94cfe8..56a66990676 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_1: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c index 6e21ee3dbe3..10c3320b58c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_1: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c index 5e971e402cb..558d704331c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_1: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c index 87e5a52570c..02bef462f1a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_1: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c index 22a0dd4ad84..da04904fa6b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_1: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c index cb307acd985..41391e2eefa 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_2: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c index b4bee212ddc..3e5f9e1fb64 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_2: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c index c467c8d49d4..228eeab9cdf 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_2: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c index 883b77b62b8..78542ca0c97 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_2: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c index bb9ffcec332..556e8ea3ea0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_2: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c index a54db487c38..918a8c3b8bc 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_2: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c index 219156c1baf..13c0291e61b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_3: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c index 87b8a70bc29..03077b72274 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_3: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c index 7acd515b712..e09a88d95bc 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_3: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c index 9141f08d2f2..ca071d15441 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_3: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c index 839a6f764b1..4acd93ce064 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_3: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c index 5d13f093356..362970cb95e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_3: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c index 34dc8041362..94d9cc47783 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_4: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c index 89c476ee2c2..51a6e7b9e08 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_4: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c index 03ca7b7aadf..9101b40fc84 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_4: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c index aafe167a964..48452e3617a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_4: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c index 08e5eb3201a..6757913b140 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_4: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c index b0e71fec47a..9c6558288c6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_4: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c index b42c75923bf..f02f8665af0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_5: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c index 625372e2262..6753c03399f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_5: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c index 250e174fea5..3fd17fa817f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_5: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c index 4a6ac6d2c3e..fba761a5668 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_5: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c index 02aa6dbde01..8872f7fd417 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_5: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c index ae1bcb98910..13539aa5412 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_5: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c index 9a740d71c67..4aa9a8f56df 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_6: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c index 1e42bfd749f..a772ee8d081 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_6: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c index c3bd46dc5b4..9c5d88b46c2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_6: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c index a6575f5e127..f9f18e982ec 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_6: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c index fd7b72e3cb8..3658fbb32d3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_6: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c index 242d2d028b1..f1a7eb808ac 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_6: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c index 3f258b877f0..50b06d54a30 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_7: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c index f37a57e4cc2..12be22079c4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_7: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c index 4e4a7eb50ed..cb735314933 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_7: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c index 29b64b46008..d52394c7d35 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_7: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c index 2bfe898f680..cf797788cae 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_7: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c index 494a3147bbb..67485a37068 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_7: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c index 678dec66117..a34bf4ae80f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_8: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c index 4acc7899475..9c25ff081a7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_8: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c index 34a992b4f62..9ee75e2aaee 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_8: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c index 1919ba5431c..8cd361e1c0a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_8: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c index 541e55cd983..ace064b2f5f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_8: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c index 36a00857145..e9a4d3bdbdf 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_8: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c index 3c916bcb995..8f1b5c0e2d0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c index edded3ebc0e..2c66eee95af 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_1: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c index 821e4bc5afe..28d7b7c0d35 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c index fd73c3a5f7a..ab183362b26 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c index a166d2888bb..c03b15d38b2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c index c06731b130c..f753c014a0a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_2: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c index ae10dffb53f..cad539c02d8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c index f3977be6edd..b595241629e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c index 5898c3b75de..08cd82094bb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c index a1017c9c0a4..e0b73748c30 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_3: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c index 83fcb602a8b..7ce0121e0c4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c index 2c398e0c1f7..48f61c12379 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c index c18a5d5939a..49d5af1e3a1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c index fa2e55dc4cc..20ad476d71d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_4: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c index 6818c0c2059..6d2c9a7f000 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c index 1096de849f0..15e613bceff 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c index fd4be5c4628..225ba0c68c8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_5: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c index 4fbc80780c5..106baf7bb02 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_5: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c index 5bc29487442..48e84f63fe3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_5: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c index 74109c3b504..9c0d42a652e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_5: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c index 3cb9cbe7895..0b541e0805d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_6: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c index fd1cb1ae33f..ee791566c24 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_6: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c index c968f3358ed..fd79139242f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_6: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c index 9cd95ad6337..f826aa40251 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_6: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c index 527f8de6351..446a951e310 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_uint16_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint32_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c index e9031dedfd1..626effc2cd8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_uint16_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint64_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c index a71bd2f479a..30146343743 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_uint32_t_fmt_7: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c index 589298643fa..541a1d8791b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_uint8_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint16_t, uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c index a42a712739e..26749a8a3ed 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_uint8_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint32_t, uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c index f37ef1c4543..321f6622b6c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_uint8_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint64_t, uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c index 3c31ac3b650..b6388dce16f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_1: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c index c6b352c21e4..cae67960785 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7_uint32_t_fmt_1: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint32_t, 7) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c index 1d9df3c3045..f9d6939f8d9 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8_uint64_t_fmt_1: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint64_t, 8) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c index 101acd88d38..d90209a1427 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_1: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c index ac57cc92fe4..a34194d636e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c index 6aca60ca709..9a801d24d90 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7_uint32_t_fmt_2: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint32_t, 7) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c index d0417243ff0..2eb57a3f3d4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8_uint64_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint64_t, 8) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c index 7baeb8d603d..363b2df8f66 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c index 6dbabf6f514..aaf1209f043 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_3: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c index 1c52b219cef..e430b37995e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7u_uint32_t_fmt_3: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint32_t, 7u) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c index ef60ce24ec8..aef5c5832f3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8ull_uint64_t_fmt_3: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint64_t, 8ull) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c index 81a4b217af6..039d982f070 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_3: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c index 2f6c04601f3..baf70c3cd61 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c index 1fc9a50a8a2..a4bfe50ba4f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7u_uint32_t_fmt_4: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint32_t, 7u) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c index 0ca423c0f01..f355de60d95 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8ull_uint64_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint64_t, 8ull) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c index c8a43fa2c5a..54880d7f1d0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c index b60c91c4948..cd6f2f8f9e9 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c index 1ac6f39ee92..dea9f6d8316 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c index af12d826718..d8a01d1a06f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c index c73353a22ee..dfc9d2e2abb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c index eb140ae4ca9..66a439ecc02 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c index 59ad242c9b3..6f40907a87a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_1: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c index 47a83823bf0..647fc6dc63d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c index f01317ba257..a344c58fff3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c index 4b7bd3a9513..87fb1fc2211 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_10: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c index a28213f44a5..280236a1d68 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_10: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c index 432da0cbddc..4b7d339f750 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_10: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c index 0658d38bc84..191c3a59fbb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_10: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c index 2e4b875f1f9..9dc41e12b0f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_11: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c index 61fb80f0320..475f94468ce 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_11: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c index 2a28b1f9a60..61e3584f610 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_11: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c index 3033844bb62..7a610556c24 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_11: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c index 9cb86dfe7a1..c4d21cb8101 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_12: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c index babe768f80a..56beb836df6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_12: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c index 294ef5a1502..1bef3fe2841 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_12: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c index 8b8f924ffba..9004281c843 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_12: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c index e724752009a..7b85582e99d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c index 9240406ae50..cfdf66c0d6e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c index 3e1efba779c..38988176158 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c index 600688a75ba..33182114a19 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c index bb2d0b703d1..61bb5e5136f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c index 06635df2393..73bfa99a272 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_3: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c index ac485daea73..24d1e695844 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c index cdc8776d8e6..5523112f96f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c index 407ff8f9787..fb6a604164a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c index cb2cd057441..0f7e2d30b44 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_4: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c index 0ce6269bbdf..c762647d543 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c index 302206ae1c8..3e5d2e61a89 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c index ce2758f473d..ab1b375fac0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_5: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c index d33cef3b633..1b8ce845102 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_5: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c index 1bf1e97968c..3fc4e7acbdb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_5: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c index b2ed732f2ad..5c34ead2d10 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_5: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c index 20614eccf0b..70dc6ecafff 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_6: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c index 5d7adfdd011..cc360362695 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_6: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c index b3c6f8db458..ea633ff6f25 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_6: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c index a4f92a8d048..7c4747a68a1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_6: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c index ebfe6739f16..cac84714fad 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_7: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c index 98841234dd2..18b8e5f03b9 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_7: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c index 67236d584e8..f5ade61c45d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_7: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c index 549d9d2ffa0..9b528a45b93 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_7: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c index aa5aec7fd12..0d093c3ac9b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_8: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c index 89a8cc957f4..f04ea1d36db 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_8: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c index a52948d3e42..17dd8f38d99 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_8: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c index 5606733b2ae..b043207cddc 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_8: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c index 984867ae1d7..19b1a5bba71 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_9: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c index d1109a4ea34..a0026a1fc89 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_9: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c index a9acf151079..01c155ea6e3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_9: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c index 47551fae521..7b94d40f567 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_9: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c index 573ef110bf9..475b31eb8ea 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32768_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*32768 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 32768) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c index 0fefbe71d02..a984f84bf82 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c index ad6d4f9693e..b2930d4fa8e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65534_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65534) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c index 02dcbc5ba3a..362cf48823d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c index 7346fbb2a9a..9f17082b63a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*6 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c index c7dac8ad86f..801a86eb9e6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c @@ -1,23 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483648_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 2147483648) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c index 4320db3c6f6..e0447681740 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c index 765d13cde64..5518064a1a1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm4294967294_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 4294967294) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c index ca11cf14008..a4cb49bbf80 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c index 37119300235..64808bfc33f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*255 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c index 2e490f05de6..493a14d4cf2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm18446744073709551614u_uint64_t_fmt_1: -** li\s+[atx][0-9]+,\s*-2 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 18446744073709551614u) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c index 45baa8fc32e..4faae52395c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint64_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c index a29a6e95d7a..3f993fdf6a3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_1: -** li\s+[atx][0-9]+,\s*82 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c index d1c6e942e48..a0d9235cd25 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm128_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*128 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 128) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c index 4c8cf90e763..67dae03dfc0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*253 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c index b958f5e1582..005453264f2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm254_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*254 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 254) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c index 1951ec5d64c..c12b5605832 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c index 86d0b39eb6f..ce9f495946e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*11 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c index 31c1bb81969..93d716983d8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32768_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*32768 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 32768) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c index 68807b947cc..8ac2ce898b5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c index 62deec103f6..740d6acabf7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c @@ -1,18 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint16_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** subw\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c index f789feecc6c..c82c4785648 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-6 -** sltiu\s+a0,\s*[atx][0-9]+,\s*6 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c index 2f4a4395d3b..b2f690a773a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c @@ -1,23 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483648_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c index dcfba62e220..e62010b0ef5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c index a3f48f7bb2f..dd063d89d54 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c @@ -1,16 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint32_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** subw\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ - DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c index 0bd8ddcdd78..c0eb8a7b956 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*-255 -** sltiu\s+a0,\s*[atx][0-9]+,\s*255 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c index 7b6d857a173..ed693137327 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c @@ -1,16 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint64_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** sub\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ - DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c index c334665a1dc..fb7db13a471 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c @@ -1,18 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_2: -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82 -** sltiu\s+a0,\s*[atx][0-9]+,\s*82 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c index 26e77f0d1ac..efe6c005bf2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm128_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-128 -** sltiu\s+a0,\s*[atx][0-9]+,\s*128 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 128) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c index c5ac1b08018..126264897f4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-253 -** sltiu\s+a0,\s*[atx][0-9]+,\s*253 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c index ee59b5adfb8..108daf2ffe2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c @@ -1,17 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint8_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** subw\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ - DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c index 69dcc2a4a93..784a97bef42 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-11 -** sltiu\s+a0,\s*[atx][0-9]+,\s*11 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c index f31236253ec..0f16f9cb2ec 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32769_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 32769) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c index fa9a9eff180..49daab566ce 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c index b98de41711e..30fc2bf87b0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*6 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c index 79457a3b41d..2d3c63dca52 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483649_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 2147483649) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c index 2e8426e1f2d..8d96c0062e4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c index 845218c1d2e..c06c441bfe3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*255 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c index ee2fbf846da..4d2b96d5c0d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_3: -** li\s+[atx][0-9]+,\s*82 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c index 8cc81e2253b..8c3eb148e6d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm134_uint8_t_fmt_3: -** li\s+[atx][0-9]+,\s*134 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 134) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c index 8d8c70bf3e6..b02d832b000 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_3: -** li\s+[atx][0-9]+,\s*253 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c index 348d75b82d8..d8e0a6959d2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_3: -** li\s+[atx][0-9]+,\s*11 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c index 089c1683b04..8f3726f0b9b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32768_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*32768 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 32768) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c index b96e3f3da84..56c377eb1c7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c index 5c209bcf106..29c6b861104 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-6 -** sltiu\s+a0,\s*[atx][0-9]+,\s*6 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c index 2f4a4395d3b..b2f690a773a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c @@ -1,23 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483648_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c index dcfba62e220..e62010b0ef5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c index ee1ad9abae0..6cfb1e4ca58 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_4: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*-255 -** sltiu\s+a0,\s*[atx][0-9]+,\s*255 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c index c334665a1dc..fb7db13a471 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c @@ -1,18 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_2: -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82 -** sltiu\s+a0,\s*[atx][0-9]+,\s*82 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c index 3fe4103a8c9..49a4150898a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm128_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-128 -** sltiu\s+a0,\s*[atx][0-9]+,\s*128 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 128) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c index 18dc5050e2b..1022de2b7dc 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-253 -** sltiu\s+a0,\s*[atx][0-9]+,\s*253 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c index 5c40f3270d1..48aaeb25d44 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-11 -** sltiu\s+a0,\s*[atx][0-9]+,\s*11 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c index b73290af8e3..d3686216016 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c index 8af803ffea3..02ca992f310 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c index 1c887d4ce72..cc01abd0c29 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_1: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c index 6bcf64bfe61..e28ee5cec9f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_1: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c index 8a35e72424b..59302cb77b1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c index a3b52de4452..735ea7e34c8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_2: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c index b9b43f14c0b..8fd3f437e8b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c index 7ed3623b872..bb4ecc5cac1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_1: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c index 7572c9e3404..e476897f46e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_2: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c index d83b5dd6caa..524d62560bd 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_2: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c index b7202f971a7..ba8b2380f11 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c index e90b853516a..cba85733634 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_2: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c index e8655b98db6..58520280496 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c index 41e676a1454..5d5cf973a85 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c index 32eeb884cbf..866e240e966 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_3: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c index 5d043ce0585..f3adfb6fd48 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_3: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c index 7e5906b5073..4e132a9370d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c index e1b0acdba7e..893f43e3b82 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_4: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c index 618d50bdbe9..5c0c7a7eaee 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c index c9a9a4cad6b..395bb1bda2d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_3: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c index 418cdc8c481..8f20c8ffeff 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_4: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c index 4903a046fde..f7e7ff23621 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_4: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c index 6f8191c6e7c..2d9b6a6caae 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c index 24bb846a049..4fa81fec058 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_4: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */