From: Zhao Liu Date: Tue, 18 Nov 2025 08:08:36 +0000 (+0800) Subject: i386/cpu: Drop incorrect comment for CPUID 0x1D X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2bc19a54499abe16726e7e8a4e8db839ecd8d060;p=thirdparty%2Fqemu.git i386/cpu: Drop incorrect comment for CPUID 0x1D The information in CPUID 0x1D.0x1 is for tile palette 1, and is not SPR-specific. This is to say, these "hardcoded" values won't change in future. If the palette needs to be extended, a new tile palette (maybe in a new subleaf) will be introduced instead of changing current information of tile palette 1. Furthermore, the previous attempt [*] to make the 0x1D.0x1 fields user-configurable is incorrect and unnecessary. Therefore, drop the incorrect and misleading comment. [*]: https://lore.kernel.org/qemu-devel/20230106083826.5384-2-lei4.wang@intel.com/ Signed-off-by: Zhao Liu Reviewed-by: Xiaoyao Li Link: https://lore.kernel.org/r/20251118080837.837505-2-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini --- diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0f618ffb03..4421c45849 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8381,7 +8381,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *edx = 0; /* EDX is reserved. */ break; case 0x1D: { - /* AMX TILE, for now hardcoded for Sapphire Rapids*/ + /* AMX TILE */ *eax = 0; *ebx = 0; *ecx = 0; @@ -8394,6 +8394,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, /* Highest numbered palette subleaf */ *eax = INTEL_AMX_TILE_MAX_SUBLEAF; } else if (count == 1) { + /* Tile palette 1 */ *eax = INTEL_AMX_TOTAL_TILE_BYTES | (INTEL_AMX_BYTES_PER_TILE << 16); *ebx = INTEL_AMX_BYTES_PER_ROW | (INTEL_AMX_TILE_MAX_NAMES << 16);