From: Peter Bergner Date: Mon, 2 Apr 2018 23:54:20 +0000 (-0500) Subject: backport: re PR target/84912 (__builtin_divde* produce Internal Compiler Error when... X-Git-Tag: releases/gcc-6.5.0~403 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2d3c8e7343b25620fd2762c95769824502a4d3ea;p=thirdparty%2Fgcc.git backport: re PR target/84912 (__builtin_divde* produce Internal Compiler Error when compiled -m32) gcc/ Backport from mainline 2018-03-28 Peter Bergner PR target/84912 * config/rs6000/rs6000.h: Update copyright date. (RS6000_BTM_POWERPC64): New define. (RS6000_BTM_COMMON): Add RS6000_BTM_POWERPC64. * config/rs6000/rs6000.c: Update copyright date. (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_POWERPC64. (rs6000_invalid_builtin): Add handling for RS6000_BTM_POWERPC64 (rs6000_builtin_mask_names): Add RS6000_BTM_POWERPC64. * config/rs6000/rs6000-builtin.def: Update copyright date. (BU_P7_POWERPC64_MISC_2): New macro definition. (DIVDE): Use it. (DIVDEU): Likewise. Backport from mainline 2018-03-28 Peter Bergner PR target/84912 * config/rs6000/rs6000-builtin.def (DIVWEO): Delete macro expansion. (DIVWEUO): Likewise. (DIVDEO): Likewise. (DIVDEUO): Likewise. * config/rs6000/rs6000.c (builtin_function_type): Remove support for DIVWEUO and DIVDEUO. * config/rs6000/rs6000.md: Update copyright date. (UNSPEC_DIVEO, UNSPEC_DIVEUO): Delete unspecs. (UNSPEC_DIV_EXTEND): Remove deleted unspecs. (div_extend): Likewise. * doc/extend.texi: Update copyright date. (__builtin_divweo): Remove documentation for deleted builtin function. (__builtin_divweuo): Likewise. (__builtin_divdeo): Likewise. (__builtin_divdeuo): Likewise. gcc/testsuite/ Backport from mainline 2018-03-28 Peter Bergner PR target/84912 * gcc.target/powerpc/extend-divide-1.c (div_weo): Remove test for deleted builtin function. (div_weuo): Likewise. * gcc.target/powerpc/extend-divide-2.c (div_deo): Likewise. (div_deuo): Likewise. From-SVN: r259021 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9cf73205757d..5361dff878bb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,41 @@ +2018-04-02 Peter Bergner + + Backport from mainline + 2018-03-28 Peter Bergner + + PR target/84912 + * config/rs6000/rs6000.h: Update copyright date. + (RS6000_BTM_POWERPC64): New define. + (RS6000_BTM_COMMON): Add RS6000_BTM_POWERPC64. + * config/rs6000/rs6000.c: Update copyright date. + (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_POWERPC64. + (rs6000_invalid_builtin): Add handling for RS6000_BTM_POWERPC64 + (rs6000_builtin_mask_names): Add RS6000_BTM_POWERPC64. + * config/rs6000/rs6000-builtin.def: Update copyright date. + (BU_P7_POWERPC64_MISC_2): New macro definition. + (DIVDE): Use it. + (DIVDEU): Likewise. + + Backport from mainline + 2018-03-28 Peter Bergner + + PR target/84912 + * config/rs6000/rs6000-builtin.def (DIVWEO): Delete macro expansion. + (DIVWEUO): Likewise. + (DIVDEO): Likewise. + (DIVDEUO): Likewise. + * config/rs6000/rs6000.c (builtin_function_type): Remove support for + DIVWEUO and DIVDEUO. + * config/rs6000/rs6000.md: Update copyright date. + (UNSPEC_DIVEO, UNSPEC_DIVEUO): Delete unspecs. + (UNSPEC_DIV_EXTEND): Remove deleted unspecs. + (div_extend): Likewise. + * doc/extend.texi: Update copyright date. + (__builtin_divweo): Remove documentation for deleted builtin function. + (__builtin_divweuo): Likewise. + (__builtin_divdeo): Likewise. + (__builtin_divdeuo): Likewise. + 2018-03-30 Cesar Philippidis Backport from mainline diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index a33faa6e5bcd..5702ba622cb0 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -1,5 +1,5 @@ /* Builtin functions for rs6000/powerpc. - Copyright (C) 2009-2016 Free Software Foundation, Inc. + Copyright (C) 2009-2018 Free Software Foundation, Inc. Contributed by Michael Meissner (meissner@linux.vnet.ibm.com) This file is part of GCC. @@ -630,6 +630,14 @@ | RS6000_BTC_BINARY), \ CODE_FOR_ ## ICODE) /* ICODE */ +#define BU_P7_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_POPCNTD /* MASK */ \ + | RS6000_BTM_POWERPC64, \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ /* Miscellaneous builtins for instructions added in ISA 2.07. These instructions do require the ISA 2.07 vector support, but they aren't vector @@ -1801,13 +1809,9 @@ BU_P9V_OVERLOAD_2 (VADUW, "vaduw") /* 2 argument extended divide functions added in ISA 2.06. */ BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si) -BU_P7_MISC_2 (DIVWEO, "divweo", CONST, diveo_si) BU_P7_MISC_2 (DIVWEU, "divweu", CONST, diveu_si) -BU_P7_MISC_2 (DIVWEUO, "divweuo", CONST, diveuo_si) -BU_P7_MISC_2 (DIVDE, "divde", CONST, dive_di) -BU_P7_MISC_2 (DIVDEO, "divdeo", CONST, diveo_di) -BU_P7_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di) -BU_P7_MISC_2 (DIVDEUO, "divdeuo", CONST, diveuo_di) +BU_P7_POWERPC64_MISC_2 (DIVDE, "divde", CONST, dive_di) +BU_P7_POWERPC64_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di) /* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */ BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index c03f1f9c1e40..ec2b32b99518 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on IBM RS/6000. - Copyright (C) 1991-2016 Free Software Foundation, Inc. + Copyright (C) 1991-2018 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GCC. @@ -3774,6 +3774,7 @@ rs6000_builtin_mask_calculate (void) | ((TARGET_P9_MISC) ? RS6000_BTM_P9_MISC : 0) | ((TARGET_MODULO) ? RS6000_BTM_MODULO : 0) | ((TARGET_64BIT) ? RS6000_BTM_64BIT : 0) + | ((TARGET_POWERPC64) ? RS6000_BTM_POWERPC64 : 0) | ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0) | ((TARGET_HTM) ? RS6000_BTM_HTM : 0) | ((TARGET_DFP) ? RS6000_BTM_DFP : 0) @@ -15647,6 +15648,11 @@ rs6000_invalid_builtin (enum rs6000_builtins fncode) error ("Builtin function %s requires the -mhard-float option", name); else if ((fnmask & RS6000_BTM_FLOAT128) != 0) error ("Builtin function %s requires the -mfloat128 option", name); + else if ((fnmask & (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64)) + == (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64)) + error ("builtin function %qs requires the %qs (or newer), and " + "%qs or %qs options", + name, "-mcpu=power7", "-m64", "-mpowerpc64"); else error ("Builtin function %s is not supported with the current options", name); @@ -17232,9 +17238,7 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, case CRYPTO_BUILTIN_VPMSUM: case MISC_BUILTIN_ADDG6S: case MISC_BUILTIN_DIVWEU: - case MISC_BUILTIN_DIVWEUO: case MISC_BUILTIN_DIVDEU: - case MISC_BUILTIN_DIVDEUO: h.uns_p[0] = 1; h.uns_p[1] = 1; h.uns_p[2] = 1; @@ -36056,6 +36060,7 @@ static struct rs6000_opt_mask const rs6000_builtin_mask_names[] = { "hard-dfp", RS6000_BTM_DFP, false, false }, { "hard-float", RS6000_BTM_HARD_FLOAT, false, false }, { "long-double-128", RS6000_BTM_LDBL128, false, false }, + { "powerpc64", RS6000_BTM_POWERPC64, false, false }, { "float128", RS6000_BTM_FLOAT128, false, false }, }; diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 9aba7529e863..feed20897f13 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000. - Copyright (C) 1992-2016 Free Software Foundation, Inc. + Copyright (C) 1992-2018 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GCC. @@ -2721,6 +2721,7 @@ extern int frame_pointer_needed; #define RS6000_BTM_HARD_FLOAT MASK_SOFT_FLOAT /* Hardware floating point. */ #define RS6000_BTM_LDBL128 MASK_MULTIPLE /* 128-bit long double. */ #define RS6000_BTM_64BIT MASK_64BIT /* 64-bit addressing. */ +#define RS6000_BTM_POWERPC64 MASK_POWERPC64 /* 64-bit registers. */ #define RS6000_BTM_FLOAT128 MASK_FLOAT128 /* IEEE 128-bit float. */ #define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \ @@ -2740,6 +2741,7 @@ extern int frame_pointer_needed; | RS6000_BTM_DFP \ | RS6000_BTM_HARD_FLOAT \ | RS6000_BTM_LDBL128 \ + | RS6000_BTM_POWERPC64 \ | RS6000_BTM_FLOAT128) /* Define builtin enum index. */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 5cb37463cf61..db57d662568c 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1,5 +1,5 @@ ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler -;; Copyright (C) 1990-2017 Free Software Foundation, Inc. +;; Copyright (C) 1990-2018 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GCC. @@ -134,9 +134,7 @@ UNSPEC_CDTBCD UNSPEC_CBCDTD UNSPEC_DIVE - UNSPEC_DIVEO UNSPEC_DIVEU - UNSPEC_DIVEUO UNSPEC_UNPACK_128BIT UNSPEC_PACK_128BIT UNSPEC_LSQ @@ -13290,14 +13288,10 @@ (set_attr "length" "4")]) (define_int_iterator UNSPEC_DIV_EXTEND [UNSPEC_DIVE - UNSPEC_DIVEO - UNSPEC_DIVEU - UNSPEC_DIVEUO]) + UNSPEC_DIVEU]) (define_int_attr div_extend [(UNSPEC_DIVE "e") - (UNSPEC_DIVEO "eo") - (UNSPEC_DIVEU "eu") - (UNSPEC_DIVEUO "euo")]) + (UNSPEC_DIVEU "eu")]) (define_insn "div_" [(set (match_operand:GPR 0 "register_operand" "=r") diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 8cc4f7e1f6a6..6e510074f16a 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -1,4 +1,4 @@ -@c Copyright (C) 1988-2016 Free Software Foundation, Inc. +@c Copyright (C) 1988-2018 Free Software Foundation, Inc. @c This is part of the GCC manual. @c For copying conditions, see the file gcc.texi. @@ -13915,21 +13915,16 @@ or @option{-mpopcntd}): @smallexample long __builtin_bpermd (long, long); int __builtin_divwe (int, int); -int __builtin_divweo (int, int); unsigned int __builtin_divweu (unsigned int, unsigned int); -unsigned int __builtin_divweuo (unsigned int, unsigned int); long __builtin_divde (long, long); -long __builtin_divdeo (long, long); unsigned long __builtin_divdeu (unsigned long, unsigned long); -unsigned long __builtin_divdeuo (unsigned long, unsigned long); unsigned int cdtbcd (unsigned int); unsigned int cbcdtd (unsigned int); unsigned int addg6s (unsigned int, unsigned int); @end smallexample -The @code{__builtin_divde}, @code{__builtin_divdeo}, -@code{__builtin_divdeu}, @code{__builtin_divdeou} functions require a -64-bit environment support ISA 2.06 or later. +The @code{__builtin_divde} and @code{__builtin_divdeu} functions +require a 64-bit environment supporting ISA 2.06 or later. The following built-in functions are available for the PowerPC family of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}): diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 896abe33ee7a..72c32dc4d5e0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,15 @@ +2018-04-02 Peter Bergner + + Backport from mainline + 2018-03-28 Peter Bergner + + PR target/84912 + * gcc.target/powerpc/extend-divide-1.c (div_weo): Remove test for + deleted builtin function. + (div_weuo): Likewise. + * gcc.target/powerpc/extend-divide-2.c (div_deo): Likewise. + (div_deuo): Likewise. + 2018-03-30 Cesar Philippidis Backport from mainline diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c index 365dead9fac8..aaf9b40fc244 100644 --- a/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c @@ -5,9 +5,7 @@ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ /* { dg-final { scan-assembler-times "divwe " 1 } } */ -/* { dg-final { scan-assembler-times "divweo " 1 } } */ /* { dg-final { scan-assembler-times "divweu " 1 } } */ -/* { dg-final { scan-assembler-times "divweuo " 1 } } */ /* { dg-final { scan-assembler-not "bl __builtin" } } */ int @@ -16,20 +14,8 @@ div_we (int a, int b) return __builtin_divwe (a, b); } -int -div_weo (int a, int b) -{ - return __builtin_divweo (a, b); -} - unsigned int div_weu (unsigned int a, unsigned int b) { return __builtin_divweu (a, b); } - -unsigned int -div_weuo (unsigned int a, unsigned int b) -{ - return __builtin_divweuo (a, b); -} diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c index 829cd40cae87..92e494aa136c 100644 --- a/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c @@ -5,9 +5,7 @@ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ /* { dg-final { scan-assembler-times "divde " 1 } } */ -/* { dg-final { scan-assembler-times "divdeo " 1 } } */ /* { dg-final { scan-assembler-times "divdeu " 1 } } */ -/* { dg-final { scan-assembler-times "divdeuo " 1 } } */ /* { dg-final { scan-assembler-not "bl __builtin" } } */ long @@ -16,20 +14,8 @@ div_de (long a, long b) return __builtin_divde (a, b); } -long -div_deo (long a, long b) -{ - return __builtin_divdeo (a, b); -} - unsigned long div_deu (unsigned long a, unsigned long b) { return __builtin_divdeu (a, b); } - -unsigned long -div_deuo (unsigned long a, unsigned long b) -{ - return __builtin_divdeuo (a, b); -}