From: Julian Seward <jseward@acm.org>
Date: Mon, 6 Dec 2004 14:23:28 +0000 (+0000)
Subject: Ensure host CPU is in the state that VEX-generated code expects prior
X-Git-Tag: svn/VALGRIND_3_0_0~1136
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2d5d04c3d1493bd760e12216d4965c3c523dcf1c;p=thirdparty%2Fvalgrind.git

Ensure host CPU is in the state that VEX-generated code expects prior
to running any such code.



git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3182
---

diff --git a/coregrind/x86/dispatch.S b/coregrind/x86/dispatch.S
index 6c5c4e78c1..7505f8c459 100644
--- a/coregrind/x86/dispatch.S
+++ b/coregrind/x86/dispatch.S
@@ -67,12 +67,22 @@ VG_(run_innerloop):
 	movl	VG_(instr_ptr_offset), %esi
 	movl	(%ebp, %esi, 1), %eax
 
-	/* set host FPU mode to the default mode expected 
+	/* set host FPU control word to the default mode expected 
 	   by VEX-generated code. */
+	finit
 	pushl	$0x037F
-	fldcw	0(%esp)
+	fldcw	(%esp)
 	addl	$4, %esp
 	
+	/* set host SSE control word to the default mode expected 
+	   by VEX-generated code. */
+	pushl	$0x1F80
+	ldmxcsr	(%esp)
+	addl	$4, %esp
+
+	/* set dir flag to known value */
+	cld
+	
 	/* fall into main loop */
 
 	/* Here, %eax is the only live (real) register.  The entire