From: Shawn Lin Date: Fri, 28 Nov 2025 07:09:22 +0000 (+0800) Subject: arm64: dts: rockchip: add dma-coherent for pcie and gmac of RK3576 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2d6fcdcaf42671dd3fb281d7a2e5ea985af11ce5;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: rockchip: add dma-coherent for pcie and gmac of RK3576 The RK3576 SoC employs ARM CCI for maintaining cache coherency between the CPU cluster and high-speed peripherals including USB3, SATA, GMAC, and PCIe controllers. While the USB3 and SATA controllers were correctly marked as dma-coherent, the GMAC and PCIe nodes were overlooked. Without dma-coherent, the kernel falls back to software cache maintenance for DMA operations, requiring explicit cache flushing and invalidating. This adds significant overhead that degrades performance in high-throughput workloads. Add the missing dma-coherent properties to enable hardware coherency and avoid unnecessary software cache management overhead. Signed-off-by: Shawn Lin Link: https://patch.msgid.link/1764313762-78063-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner --- diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index a86fc6b4e8c45..792857aee4f7a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -680,6 +680,7 @@ "aclk_dbi", "pclk", "aux"; device_type = "pci"; + dma-coherent; interrupts = , , , @@ -734,6 +735,7 @@ "aclk_dbi", "pclk", "aux"; device_type = "pci"; + dma-coherent; interrupts = , , , @@ -1696,6 +1698,7 @@ clock-names = "stmmaceth", "clk_mac_ref", "pclk_mac", "aclk_mac", "ptp_ref"; + dma-coherent; interrupts = , ; interrupt-names = "macirq", "eth_wake_irq"; @@ -1743,6 +1746,7 @@ clock-names = "stmmaceth", "clk_mac_ref", "pclk_mac", "aclk_mac", "ptp_ref"; + dma-coherent; interrupts = , ; interrupt-names = "macirq", "eth_wake_irq";