From: H.J. Lu <hjl.tools@gmail.com>
Date: Fri, 15 Apr 2016 12:22:53 +0000 (-0700)
Subject: Detect Intel Goldmont and Airmont processors
X-Git-Tag: glibc-2.24~378
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2e2d9796daba2776e661c5a9e570370b6bcb5aec;p=thirdparty%2Fglibc.git

Detect Intel Goldmont and Airmont processors

Updated from the model numbers of Goldmont and Airmont processors in
Intel64 And IA-32 Processor Architectures Software Developer's Manual
Volume 3 Revision 058.

	* sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel
	Goldmont and Airmont processors.
---

diff --git a/ChangeLog b/ChangeLog
index 44deb0fd26d..0b0b5e2202c 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2016-04-15   H.J. Lu  <hongjiu.lu@intel.com>
+
+	* sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel
+	Goldmont and Airmont processors.
+
 2016-04-15  Wilco Dijkstra  <wdijkstr@arm.com>
 
 	* string/string.h: Use __GNUC_PREREQ(3,4) for bits/string2.h.
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 963b8459168..a5fa81f709f 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -140,6 +140,14 @@ init_cpu_features (struct cpu_features *cpu_features)
 	      cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
 		|= bit_arch_Prefer_No_VZEROUPPER;
 
+	    case 0x5c:
+	    case 0x5f:
+	      /* Unaligned load versions are faster than SSSE3
+		 on Goldmont.  */
+
+	    case 0x4c:
+	      /* Airmont is a die shrink of Silvermont.  */
+
 	    case 0x37:
 	    case 0x4a:
 	    case 0x4d: