From: Stefan Eichenberger Date: Mon, 20 Jan 2025 09:45:22 +0000 (+0100) Subject: arm64: dts: imx8-apalis: add clock configuration for 44.1 kHz hdmi audio X-Git-Tag: v6.15-rc1~159^2~16^2~51 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2e662a2c3770315d6459be2df7ea39a424ace6fb;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: imx8-apalis: add clock configuration for 44.1 kHz hdmi audio Currently, HDMI audio cannot play sound at a 44.1 kHz sample rate due to a clock frequency mismatch. This update resolves the issue by allowing the sai driver to change the clock parent to AUDIO_PLL_1 when the sample rate is 44.1 kHz. It also ensures that AUDIO_PLL_1 operates at the correct frequency for this configuration. Signed-off-by: Stefan Eichenberger Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi index a3fc945aea163..dbea1eefdeecf 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi @@ -790,6 +790,22 @@ status = "okay"; }; +/* Apalis HDMI Audio */ +&sai5 { + assigned-clocks = <&acm IMX_ADMA_ACM_SAI5_MCLK_SEL>, + <&acm IMX_ADMA_ACM_AUD_CLK1_SEL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, + <&sai5_lpcg 0>; + assigned-clock-parents = <&aud_pll_div0_lpcg 0>, <&aud_rec1_lpcg 0>; + assigned-clock-rates = <0>, <0>, <786432000>, <49152000>, <12288000>, + <722534400>, <45158400>, <11289600>, <49152000>; +}; + /* TODO: Apalis SATA1 */ /* Apalis SPDIF1 */