From: Julian Seward Date: Mon, 7 Feb 2005 00:17:12 +0000 (+0000) Subject: Get a clean(er) build on amd64. Also a couple of amd64 fe/be fixes. X-Git-Tag: svn/VALGRIND_3_0_1^2~480 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2e798a8c201b3880b169adc0e5d55374a98eead0;p=thirdparty%2Fvalgrind.git Get a clean(er) build on amd64. Also a couple of amd64 fe/be fixes. git-svn-id: svn://svn.valgrind.org/vex/trunk@854 --- diff --git a/VEX/priv/guest-amd64/ghelpers.c b/VEX/priv/guest-amd64/ghelpers.c index b6e80271da..1c15a3e474 100644 --- a/VEX/priv/guest-amd64/ghelpers.c +++ b/VEX/priv/guest-amd64/ghelpers.c @@ -182,7 +182,7 @@ void LibVEX_GuestAMD64_initialise ( /*OUT*/VexGuestAMD64State* vex_state ) vex_state->guest_R14 = 0; vex_state->guest_R15 = 0; - vex_state->guest_CC_OP = 999;//X86G_CC_OP_COPY; // XXX ??? + vex_state->guest_CC_OP = AMD64G_CC_OP_COPY; vex_state->guest_CC_DEP1 = 0; vex_state->guest_CC_DEP2 = 0; vex_state->guest_CC_NDEP = 0; diff --git a/VEX/priv/guest-arm/toIR.c b/VEX/priv/guest-arm/toIR.c index 10fa5940d6..61e229eb62 100644 --- a/VEX/priv/guest-arm/toIR.c +++ b/VEX/priv/guest-arm/toIR.c @@ -276,7 +276,7 @@ IRBB* bbToIR_ARM ( UChar* armCode, if (0 && (n_resteers & 0xFF) == 0) vex_printf("resteer[%d,%d] to %p (delta = %d)\n", n_resteers, d_resteers, - (void*)(UInt)(guest_next), delta); + ULong_to_Ptr(guest_next), delta); break; } } diff --git a/VEX/priv/guest-ppc32/toIR.c b/VEX/priv/guest-ppc32/toIR.c index 487c50e1db..802a076401 100644 --- a/VEX/priv/guest-ppc32/toIR.c +++ b/VEX/priv/guest-ppc32/toIR.c @@ -323,7 +323,7 @@ IRBB* bbToIR_PPC32 ( UChar* ppc32code, if (0 && (n_resteers & 0xFF) == 0) vex_printf("resteer[%d,%d] to %p (delta = %d)\n", n_resteers, d_resteers, - (void*)(UInt)(guest_next), delta); + ULong_to_Ptr(guest_next), delta); break; } } diff --git a/VEX/priv/guest-x86/ghelpers.c b/VEX/priv/guest-x86/ghelpers.c index 457a69f157..3cb86bfabe 100644 --- a/VEX/priv/guest-x86/ghelpers.c +++ b/VEX/priv/guest-x86/ghelpers.c @@ -1509,7 +1509,7 @@ static void convert_f80le_to_f64le ( /*IN*/UChar* f80, /*OUT*/UChar* f64 ) ULong x86g_loadF80le ( UInt addrU ) { ULong f64; - convert_f80le_to_f64le ( (UChar*)addrU, (UChar*)&f64 ); + convert_f80le_to_f64le ( (UChar*)ULong_to_Ptr(addrU), (UChar*)&f64 ); return f64; } @@ -1517,7 +1517,7 @@ ULong x86g_loadF80le ( UInt addrU ) /* DIRTY HELPER (writes guest memory) */ void x86g_storeF80le ( UInt addrU, ULong f64 ) { - convert_f64le_to_f80le( (UChar*)&f64, (UChar*)addrU ); + convert_f64le_to_f80le( (UChar*)&f64, (UChar*)ULong_to_Ptr(addrU) ); } diff --git a/VEX/priv/guest-x86/toIR.c b/VEX/priv/guest-x86/toIR.c index 3dac8bd5e7..ae7ae7e198 100644 --- a/VEX/priv/guest-x86/toIR.c +++ b/VEX/priv/guest-x86/toIR.c @@ -358,7 +358,7 @@ IRBB* bbToIR_X86 ( UChar* x86code, if (0 && (n_resteers & 0xFF) == 0) vex_printf("resteer[%d,%d] to %p (delta = %d)\n", n_resteers, d_resteers, - (void*)(UInt)(guest_next), delta); + ULong_to_Ptr(guest_next), delta); break; } } diff --git a/VEX/priv/host-amd64/hdefs.c b/VEX/priv/host-amd64/hdefs.c index b11f6706bf..f662ec4a59 100644 --- a/VEX/priv/host-amd64/hdefs.c +++ b/VEX/priv/host-amd64/hdefs.c @@ -1044,7 +1044,7 @@ void ppAMD64Instr ( AMD64Instr* i ) if (i->Ain.Goto.jk != Ijk_Boring) { vex_printf("movl $"); ppIRJumpKind(i->Ain.Goto.jk); - vex_printf(",%%rbp ; "); + vex_printf(",%%ebp ; "); } vex_printf("movq "); ppAMD64RI(i->Ain.Goto.dst); @@ -2020,7 +2020,7 @@ static UChar rexAMode_R ( HReg greg, HReg ereg ) Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr* i ) { - UInt irno, opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc; + UInt /*irno,*/ opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc; //.. //.. UInt xtra; UChar* p = &buf[0]; @@ -2417,8 +2417,10 @@ vassert(0); /* Get the destination address into %rax */ if (i->Ain.Goto.dst->tag == Ari_Imm) { - /* movl $immediate, %eax ; ret */ - *p++ = 0xB8; + /* movl sign-ext($immediate), %rax ; ret */ + *p++ = 0x48; + *p++ = 0xC7; + *p++ = 0xC0; p = emit32(p, i->Ain.Goto.dst->Ari.Imm.imm32); } else { vassert(i->Ain.Goto.dst->tag == Ari_Reg); diff --git a/VEX/priv/host-amd64/isel.c b/VEX/priv/host-amd64/isel.c index e82de7d731..9c4dd4167c 100644 --- a/VEX/priv/host-amd64/isel.c +++ b/VEX/priv/host-amd64/isel.c @@ -216,14 +216,14 @@ static AMD64AMode* iselIntExpr_AMode ( ISelEnv* env, IRExpr* e ); static AMD64CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e ); static AMD64CondCode iselCondCode ( ISelEnv* env, IRExpr* e ); -static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e ); -static HReg iselDblExpr ( ISelEnv* env, IRExpr* e ); +//static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e ); +//static HReg iselDblExpr ( ISelEnv* env, IRExpr* e ); -static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ); -static HReg iselFltExpr ( ISelEnv* env, IRExpr* e ); +//static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ); +//static HReg iselFltExpr ( ISelEnv* env, IRExpr* e ); -static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e ); -static HReg iselVecExpr ( ISelEnv* env, IRExpr* e ); +//static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e ); +//static HReg iselVecExpr ( ISelEnv* env, IRExpr* e ); /*---------------------------------------------------------*/ @@ -2725,18 +2725,18 @@ static AMD64CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e ) //.. /* DO NOT CALL THIS DIRECTLY */ //.. static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e ) //.. { -//.. -//.. # define REQUIRE_SSE1 \ -//.. do { if (env->subarch == VexSubArchX86_sse0) \ -//.. goto vec_fail; \ -//.. } while (0) -//.. -//.. # define REQUIRE_SSE2 \ -//.. do { if (env->subarch == VexSubArchX86_sse0 \ -//.. || env->subarch == VexSubArchX86_sse1) \ -//.. goto vec_fail; \ -//.. } while (0) -//.. +#if 0 +# define REQUIRE_SSE1 \ + do { if (env->subarch == VexSubArchX86_sse0) \ + goto vec_fail; \ + } while (0) + +# define REQUIRE_SSE2 \ + do { if (env->subarch == VexSubArchX86_sse0 \ + || env->subarch == VexSubArchX86_sse1) \ + goto vec_fail; \ + } while (0) +#endif //.. Bool arg1isEReg = False; //.. X86SseOp op = Xsse_INVALID; //.. IRType ty = typeOfIRExpr(env->type_env,e); diff --git a/VEX/priv/host-x86/isel.c b/VEX/priv/host-x86/isel.c index 26cbd18700..b443ac9718 100644 --- a/VEX/priv/host-x86/isel.c +++ b/VEX/priv/host-x86/isel.c @@ -350,7 +350,8 @@ void callHelperAndClearArgs ( ISelEnv* env, X86CondCode cc, parameters. */ vassert(sizeof(void*) == 4); - addInstr(env, X86Instr_Call( cc, (UInt)cee->addr, cee->regparms)); + addInstr(env, X86Instr_Call( cc, (UInt)Ptr_to_ULong(cee->addr), + cee->regparms)); if (n_arg_ws > 0) add_to_esp(env, 4*n_arg_ws); } diff --git a/VEX/priv/ir/iropt.c b/VEX/priv/ir/iropt.c index fc8f74578a..967b243bf6 100644 --- a/VEX/priv/ir/iropt.c +++ b/VEX/priv/ir/iropt.c @@ -988,11 +988,18 @@ static IRExpr* fold_Expr ( IRExpr* e ) (e->Iex.Binop.arg1->Iex.Const.con->Ico.U32 - e->Iex.Binop.arg2->Iex.Const.con->Ico.U32))); break; + case Iop_Add32: e2 = IRExpr_Const(IRConst_U32( (e->Iex.Binop.arg1->Iex.Const.con->Ico.U32 + e->Iex.Binop.arg2->Iex.Const.con->Ico.U32))); break; + case Iop_Add64: + e2 = IRExpr_Const(IRConst_U64( + (e->Iex.Binop.arg1->Iex.Const.con->Ico.U64 + + e->Iex.Binop.arg2->Iex.Const.con->Ico.U64))); + break; + case Iop_Xor32: e2 = IRExpr_Const(IRConst_U32( (e->Iex.Binop.arg1->Iex.Const.con->Ico.U32