From: Paolo Bonzini Date: Wed, 7 Jan 2026 15:42:19 +0000 (+0100) Subject: target/i386/tcg: fix a few instructions that do not support VEX.L=1 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2eb8d9734355ed86e162dce2a3f265ffee4005ed;p=thirdparty%2Fqemu.git target/i386/tcg: fix a few instructions that do not support VEX.L=1 Match the contents of table 2-17 ("#UD Exception and VEX.L Field Encoding") in the SDM, for instruction in exception class 5. They were incorrectly accepting 256-bit versions that do not exist. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index 09e3d8884c..e44b92710c 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386/tcg/decode-new.c.inc @@ -628,7 +628,7 @@ static void decode_0F7E(DisasContext *s, CPUX86State *env, X86OpEntry *entry, ui static const X86OpEntry opcodes_0F7E[4] = { X86_OP_ENTRY3(MOVD_from, E,y, None,None, P,y, vex5 mmx), X86_OP_ENTRY3(MOVD_from, E,y, None,None, V,y, vex5), - X86_OP_ENTRY3(MOVQ, V,x, None,None, W,q, vex5), /* wrong dest Vy on SDM! */ + X86_OP_ENTRY3(MOVQ, V,dq,None,None, W,q, vex5), /* wrong dest Vq on SDM! */ {}, }; *entry = *decode_by_prefix(s, opcodes_0F7E); @@ -693,7 +693,7 @@ static void decode_0FD6(DisasContext *s, CPUX86State *env, X86OpEntry *entry, ui { static const X86OpEntry movq[4] = { {}, - X86_OP_ENTRY3(MOVQ, W,x, None, None, V,q, vex5), + X86_OP_ENTRY3(MOVQ, W,dq, None, None, V,q, vex5), X86_OP_ENTRY3(MOVq_dq, V,dq, None, None, N,q), X86_OP_ENTRY3(MOVq_dq, P,q, None, None, U,q), }; @@ -1102,7 +1102,7 @@ static void decode_0F12(DisasContext *s, CPUX86State *env, X86OpEntry *entry, ui }; static const X86OpEntry opcodes_0F12_reg[4] = { X86_OP_ENTRY3(VMOVHLPS, V,dq, H,dq, U,dq, vex7), - X86_OP_ENTRY3(VMOVLPx, W,x, H,x, U,q, vex5), /* MOVLPD */ + X86_OP_ENTRY3(VMOVLPx, W,dq, H,dq, U,q, vex5), /* MOVLPD */ X86_OP_ENTRY3(VMOVSLDUP, V,x, None,None, U,x, vex4 cpuid(SSE3)), X86_OP_ENTRY3(VMOVDDUP, V,x, None,None, U,x, vex5 cpuid(SSE3)), }; @@ -1465,7 +1465,7 @@ static const X86OpEntry opcodes_0F[256] = { [0x6b] = X86_OP_ENTRY3(PACKSSDW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66), [0x6c] = X86_OP_ENTRY3(PUNPCKLQDQ, V,x, H,x, W,x, vex4 p_66 avx2_256), [0x6d] = X86_OP_ENTRY3(PUNPCKHQDQ, V,x, H,x, W,x, vex4 p_66 avx2_256), - [0x6e] = X86_OP_ENTRY3(MOVD_to, V,x, None,None, E,y, vex5 mmx p_00_66), /* wrong dest Vy on SDM! */ + [0x6e] = X86_OP_ENTRY3(MOVD_to, V,dq,None,None, E,y, vex5 mmx p_00_66), /* wrong dest Vy on SDM! */ [0x6f] = X86_OP_GROUP0(0F6F), [0x78] = X86_OP_GROUP0(0F78),