From: Carl Love Date: Fri, 5 Sep 2014 18:05:24 +0000 (+0000) Subject: The update fixes a format issue in the PPC test X-Git-Tag: svn/VALGRIND_3_10_0~43 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2fabdec65e92475f4181a0faaaddfa20f7befa70;p=thirdparty%2Fvalgrind.git The update fixes a format issue in the PPC test none/tests/ppc32/jm-insns.c and none/tests/ppc64/jm-insns.c. The BE and LE output expect files are updated as well. There is no Bugzilla related to this update. The issue was found and the initial patch and BE output update was done by Florian Krohm . Carl Love added the LE output update. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14466 --- diff --git a/memcheck/tests/Makefile.am b/memcheck/tests/Makefile.am index 72dd61bfb9..94242fedb8 100644 --- a/memcheck/tests/Makefile.am +++ b/memcheck/tests/Makefile.am @@ -422,7 +422,11 @@ fprw_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ inits_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ +if COMPILER_IS_CLANG +inlinfo_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ -Wno-static-local-in-inline +else inlinfo_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ +endif inltemplate_SOURCES = inltemplate.cpp inltemplate_CXXFLAGS = $(AM_CXXFLAGS) @FLAG_W_NO_UNINITIALIZED@ diff --git a/none/tests/ppc32/jm-insns.c b/none/tests/ppc32/jm-insns.c index 69c736ab80..27f971234e 100644 --- a/none/tests/ppc32/jm-insns.c +++ b/none/tests/ppc32/jm-insns.c @@ -5586,7 +5586,7 @@ static void test_int_ld_one_reg_imm16 (const char* name, #ifndef __powerpc64__ printf("%s %2d, (%08x) => %08x, %2d (%08x %08x)\n", #else - printf("%s %3d, (%016x) => %016llx, %3lld (%08x %08x)\n", + printf("%s %3d, (%016llx) => %016llx, %3lld (%08x %08x)\n", #endif name, offs, iargs[nb_iargs-1 + i], res, r14-base, flags, xer); } diff --git a/none/tests/ppc64/jm-int.stdout.exp b/none/tests/ppc64/jm-int.stdout.exp index 060f2aed87..9b8c5dd92c 100644 --- a/none/tests/ppc64/jm-int.stdout.exp +++ b/none/tests/ppc64/jm-int.stdout.exp @@ -4551,78 +4551,78 @@ PPC integer load insns lbz 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lbz 7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lbz 15, (ffffffffffffffff) => 00000000000000ef, 0 (00000000 00000000) - lbz 1, (00000000ffffffff) => 00000000000000ff, 0 (00000000 00000000) - lbz -7, (00000000be991def) => 0000000000000000, 0 (00000000 00000000) + lbz 1, (ffffffffffffffff) => 00000000000000ff, 0 (00000000 00000000) + lbz -7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lbz -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lbzu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lbzu 7, (0000001cbe991def) => 0000000000000000, 7 (00000000 00000000) lbzu 15, (ffffffffffffffff) => 00000000000000ef, 15 (00000000 00000000) - lbzu 1, (00000000ffffffff) => 00000000000000ff, 1 (00000000 00000000) - lbzu -7, (00000000be991def) => 0000000000000000, -7 (00000000 00000000) + lbzu 1, (ffffffffffffffff) => 00000000000000ff, 1 (00000000 00000000) + lbzu -7, (0000001cbe991def) => 0000000000000000, -7 (00000000 00000000) lbzu -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) lha 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lha 7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lha 15, (ffffffffffffffff) => ffffffffffffefff, 0 (00000000 00000000) - lha 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - lha -7, (00000000be991def) => 0000000000000000, 0 (00000000 00000000) + lha 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + lha -7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lha -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhau 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhau 7, (0000001cbe991def) => 0000000000000000, 7 (00000000 00000000) lhau 15, (ffffffffffffffff) => ffffffffffffefff, 15 (00000000 00000000) - lhau 1, (00000000ffffffff) => ffffffffffffffff, 1 (00000000 00000000) - lhau -7, (00000000be991def) => 0000000000000000, -7 (00000000 00000000) + lhau 1, (ffffffffffffffff) => ffffffffffffffff, 1 (00000000 00000000) + lhau -7, (0000001cbe991def) => 0000000000000000, -7 (00000000 00000000) lhau -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) lhz 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhz 7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lhz 15, (ffffffffffffffff) => 000000000000efff, 0 (00000000 00000000) - lhz 1, (00000000ffffffff) => 000000000000ffff, 0 (00000000 00000000) - lhz -7, (00000000be991def) => 0000000000000000, 0 (00000000 00000000) + lhz 1, (ffffffffffffffff) => 000000000000ffff, 0 (00000000 00000000) + lhz -7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lhz -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhzu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhzu 7, (0000001cbe991def) => 0000000000000000, 7 (00000000 00000000) lhzu 15, (ffffffffffffffff) => 000000000000efff, 15 (00000000 00000000) - lhzu 1, (00000000ffffffff) => 000000000000ffff, 1 (00000000 00000000) - lhzu -7, (00000000be991def) => 0000000000000000, -7 (00000000 00000000) + lhzu 1, (ffffffffffffffff) => 000000000000ffff, 1 (00000000 00000000) + lhzu -7, (0000001cbe991def) => 0000000000000000, -7 (00000000 00000000) lhzu -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) lwz 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwz 7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lwz 15, (ffffffffffffffff) => 00000000efffffff, 0 (00000000 00000000) - lwz 1, (00000000ffffffff) => 00000000ffffffff, 0 (00000000 00000000) - lwz -7, (00000000be991def) => 0000000000001cbe, 0 (00000000 00000000) + lwz 1, (ffffffffffffffff) => 00000000ffffffff, 0 (00000000 00000000) + lwz -7, (0000001cbe991def) => 0000000000001cbe, 0 (00000000 00000000) lwz -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwzu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwzu 7, (0000001cbe991def) => 0000000000000000, 7 (00000000 00000000) lwzu 15, (ffffffffffffffff) => 00000000efffffff, 15 (00000000 00000000) - lwzu 1, (00000000ffffffff) => 00000000ffffffff, 1 (00000000 00000000) - lwzu -7, (00000000be991def) => 0000000000001cbe, -7 (00000000 00000000) + lwzu 1, (ffffffffffffffff) => 00000000ffffffff, 1 (00000000 00000000) + lwzu -7, (0000001cbe991def) => 0000000000001cbe, -7 (00000000 00000000) lwzu -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) ld 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) ld 7, (0000001cbe991def) => 000000000000001c, 0 (00000000 00000000) ld 15, (ffffffffffffffff) => be991defffffffff, 0 (00000000 00000000) - ld 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - ld -7, (00000000be991def) => 0000001cbe991def, -8 (00000000 00000000) + ld 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + ld -7, (0000001cbe991def) => 0000001cbe991def, -8 (00000000 00000000) ld -15, (0000000000000000) => 0000000000000000, -16 (00000000 00000000) ldu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) ldu 7, (0000001cbe991def) => 000000000000001c, 4 (00000000 00000000) ldu 15, (ffffffffffffffff) => be991defffffffff, 12 (00000000 00000000) - ldu 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - ldu -7, (00000000be991def) => 0000001cbe991def, -8 (00000000 00000000) + ldu 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + ldu -7, (0000001cbe991def) => 0000001cbe991def, -8 (00000000 00000000) ldu -15, (0000000000000000) => 0000000000000000, -16 (00000000 00000000) lwa 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwa 7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lwa 15, (ffffffffffffffff) => ffffffffbe991def, 0 (00000000 00000000) - lwa 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - lwa -7, (00000000be991def) => 0000001cbe991def, -8 (00000000 00000000) + lwa 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + lwa -7, (0000001cbe991def) => 0000001cbe991def, -8 (00000000 00000000) lwa -15, (0000000000000000) => 0000000000000000, -16 (00000000 00000000) PPC integer load insns with two register args: diff --git a/none/tests/ppc64/jm-int.stdout.exp-LE b/none/tests/ppc64/jm-int.stdout.exp-LE index d5f9625fac..bc67eb3d68 100644 --- a/none/tests/ppc64/jm-int.stdout.exp-LE +++ b/none/tests/ppc64/jm-int.stdout.exp-LE @@ -4551,78 +4551,78 @@ PPC integer load insns lbz 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lbz 7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lbz 15, (ffffffffffffffff) => 0000000000000000, 0 (00000000 00000000) - lbz 1, (00000000ffffffff) => 00000000000000ff, 0 (00000000 00000000) - lbz -7, (00000000be991def) => 000000000000001d, 0 (00000000 00000000) + lbz 1, (ffffffffffffffff) => 00000000000000ff, 0 (00000000 00000000) + lbz -7, (0000001cbe991def) => 000000000000001d, 0 (00000000 00000000) lbz -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lbzu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lbzu 7, (0000001cbe991def) => 0000000000000000, 7 (00000000 00000000) lbzu 15, (ffffffffffffffff) => 0000000000000000, 15 (00000000 00000000) - lbzu 1, (00000000ffffffff) => 00000000000000ff, 1 (00000000 00000000) - lbzu -7, (00000000be991def) => 000000000000001d, -7 (00000000 00000000) + lbzu 1, (ffffffffffffffff) => 00000000000000ff, 1 (00000000 00000000) + lbzu -7, (0000001cbe991def) => 000000000000001d, -7 (00000000 00000000) lbzu -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) lha 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lha 7, (0000001cbe991def) => ffffffffffffef00, 0 (00000000 00000000) lha 15, (ffffffffffffffff) => ffffffffffffff00, 0 (00000000 00000000) - lha 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - lha -7, (00000000be991def) => ffffffffffff991d, 0 (00000000 00000000) + lha 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + lha -7, (0000001cbe991def) => ffffffffffff991d, 0 (00000000 00000000) lha -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhau 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhau 7, (0000001cbe991def) => ffffffffffffef00, 7 (00000000 00000000) lhau 15, (ffffffffffffffff) => ffffffffffffff00, 15 (00000000 00000000) - lhau 1, (00000000ffffffff) => ffffffffffffffff, 1 (00000000 00000000) - lhau -7, (00000000be991def) => ffffffffffff991d, -7 (00000000 00000000) + lhau 1, (ffffffffffffffff) => ffffffffffffffff, 1 (00000000 00000000) + lhau -7, (0000001cbe991def) => ffffffffffff991d, -7 (00000000 00000000) lhau -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) lhz 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhz 7, (0000001cbe991def) => 000000000000ef00, 0 (00000000 00000000) lhz 15, (ffffffffffffffff) => 000000000000ff00, 0 (00000000 00000000) - lhz 1, (00000000ffffffff) => 000000000000ffff, 0 (00000000 00000000) - lhz -7, (00000000be991def) => 000000000000991d, 0 (00000000 00000000) + lhz 1, (ffffffffffffffff) => 000000000000ffff, 0 (00000000 00000000) + lhz -7, (0000001cbe991def) => 000000000000991d, 0 (00000000 00000000) lhz -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhzu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lhzu 7, (0000001cbe991def) => 000000000000ef00, 7 (00000000 00000000) lhzu 15, (ffffffffffffffff) => 000000000000ff00, 15 (00000000 00000000) - lhzu 1, (00000000ffffffff) => 000000000000ffff, 1 (00000000 00000000) - lhzu -7, (00000000be991def) => 000000000000991d, -7 (00000000 00000000) + lhzu 1, (ffffffffffffffff) => 000000000000ffff, 1 (00000000 00000000) + lhzu -7, (0000001cbe991def) => 000000000000991d, -7 (00000000 00000000) lhzu -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) lwz 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwz 7, (0000001cbe991def) => 00000000991def00, 0 (00000000 00000000) lwz 15, (ffffffffffffffff) => 00000000ffffff00, 0 (00000000 00000000) - lwz 1, (00000000ffffffff) => 00000000ffffffff, 0 (00000000 00000000) - lwz -7, (00000000be991def) => 000000001cbe991d, 0 (00000000 00000000) + lwz 1, (ffffffffffffffff) => 00000000ffffffff, 0 (00000000 00000000) + lwz -7, (0000001cbe991def) => 000000001cbe991d, 0 (00000000 00000000) lwz -15, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwzu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwzu 7, (0000001cbe991def) => 00000000991def00, 7 (00000000 00000000) lwzu 15, (ffffffffffffffff) => 00000000ffffff00, 15 (00000000 00000000) - lwzu 1, (00000000ffffffff) => 00000000ffffffff, 1 (00000000 00000000) - lwzu -7, (00000000be991def) => 000000001cbe991d, -7 (00000000 00000000) + lwzu 1, (ffffffffffffffff) => 00000000ffffffff, 1 (00000000 00000000) + lwzu -7, (0000001cbe991def) => 000000001cbe991d, -7 (00000000 00000000) lwzu -15, (0000000000000000) => 0000000000000000, -15 (00000000 00000000) ld 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) ld 7, (0000001cbe991def) => be991def00000000, 0 (00000000 00000000) ld 15, (ffffffffffffffff) => ffffffff0000001c, 0 (00000000 00000000) - ld 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - ld -7, (00000000be991def) => 0000001cbe991def, -8 (00000000 00000000) + ld 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + ld -7, (0000001cbe991def) => 0000001cbe991def, -8 (00000000 00000000) ld -15, (0000000000000000) => 0000000000000000, -16 (00000000 00000000) ldu 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) ldu 7, (0000001cbe991def) => be991def00000000, 4 (00000000 00000000) ldu 15, (ffffffffffffffff) => ffffffff0000001c, 12 (00000000 00000000) - ldu 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - ldu -7, (00000000be991def) => 0000001cbe991def, -8 (00000000 00000000) + ldu 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + ldu -7, (0000001cbe991def) => 0000001cbe991def, -8 (00000000 00000000) ldu -15, (0000000000000000) => 0000000000000000, -16 (00000000 00000000) lwa 0, (0000000000000000) => 0000000000000000, 0 (00000000 00000000) lwa 7, (0000001cbe991def) => 0000000000000000, 0 (00000000 00000000) lwa 15, (ffffffffffffffff) => 000000000000001c, 0 (00000000 00000000) - lwa 1, (00000000ffffffff) => ffffffffffffffff, 0 (00000000 00000000) - lwa -7, (00000000be991def) => 0000001cbe991def, -8 (00000000 00000000) + lwa 1, (ffffffffffffffff) => ffffffffffffffff, 0 (00000000 00000000) + lwa -7, (0000001cbe991def) => 0000001cbe991def, -8 (00000000 00000000) lwa -15, (0000000000000000) => 0000000000000000, -16 (00000000 00000000) PPC integer load insns with two register args: