From: Michal Privoznik Date: Wed, 21 Jan 2026 09:46:43 +0000 (+0100) Subject: conf: Allow aw_bits for virtio-iommu X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2fccdda851e61ef1cea1ca38a462a9012b17b961;p=thirdparty%2Flibvirt.git conf: Allow aw_bits for virtio-iommu Introduced in QEMU commit of v9.0.0-rc0~9^2~7 the virtio-iommu device is also capable of using different addres width. The corresponding attribute is also called 'aw-bits', just like in case of intel-iommu. Wire up the missing pieces. Signed-off-by: Michal Privoznik Reviewed-by: Peter Krempa --- diff --git a/docs/formatdomain.rst b/docs/formatdomain.rst index 0fa9d2e08b..7dd99e040f 100644 --- a/docs/formatdomain.rst +++ b/docs/formatdomain.rst @@ -9253,7 +9253,7 @@ Example: ``aw_bits`` The ``aw_bits`` attribute can be used to set the address width to allow mapping larger iova addresses in the guest. :since:`Since 6.5.0` (QEMU/KVM - and ``intel`` model only) + and ``intel`` or ``virtio`` models only) ``dma_translation`` The ``dma_translation`` attribute with possible values ``on`` and ``off`` can diff --git a/src/conf/domain_validate.c b/src/conf/domain_validate.c index 4482203087..c83fff132b 100644 --- a/src/conf/domain_validate.c +++ b/src/conf/domain_validate.c @@ -3206,14 +3206,22 @@ virDomainIOMMUDefValidate(const virDomainIOMMUDef *iommu) iommu->caching_mode != VIR_TRISTATE_SWITCH_ABSENT || iommu->eim != VIR_TRISTATE_SWITCH_ABSENT || iommu->iotlb != VIR_TRISTATE_SWITCH_ABSENT || - iommu->aw_bits != 0 || iommu->dma_translation != VIR_TRISTATE_SWITCH_ABSENT || iommu->pci_bus >= 0) { virReportError(VIR_ERR_XML_ERROR, - _("iommu model '%1$s' doesn't support additional attributes"), + _("iommu model '%1$s' doesn't support some additional attributes"), virDomainIOMMUModelTypeToString(iommu->model)); return -1; } + + /* QEMU mandates address width of the IOVA address space to be inside + * [32,64] range, but since it stems from virtio specification it can + * be assumed to be hypervisor agnostic and thus can live here. */ + if (iommu->aw_bits != 0 && (iommu->aw_bits < 32 || iommu->aw_bits > 64)) { + virReportError(VIR_ERR_XML_ERROR, "%s", + _("aw-bits must be within [32,64]")); + return -1; + } break; case VIR_DOMAIN_IOMMU_MODEL_AMD: diff --git a/src/qemu/qemu_validate.c b/src/qemu/qemu_validate.c index 5474d00ecd..d0572bcbb2 100644 --- a/src/qemu/qemu_validate.c +++ b/src/qemu/qemu_validate.c @@ -5552,6 +5552,8 @@ qemuValidateDomainDeviceDefIOMMU(const virDomainIOMMUDef *iommu, const virDomainDef *def, virQEMUCaps *qemuCaps) { + bool aw_bits_supported = false; + switch (iommu->model) { case VIR_DOMAIN_IOMMU_MODEL_INTEL: if (!qemuDomainIsQ35(def)) { @@ -5566,6 +5568,7 @@ qemuValidateDomainDeviceDefIOMMU(const virDomainIOMMUDef *iommu, virDomainIOMMUModelTypeToString(iommu->model)); return -1; } + aw_bits_supported = virQEMUCapsGet(qemuCaps, QEMU_CAPS_INTEL_IOMMU_AW_BITS); break; case VIR_DOMAIN_IOMMU_MODEL_SMMUV3: @@ -5611,6 +5614,7 @@ qemuValidateDomainDeviceDefIOMMU(const virDomainIOMMUDef *iommu, virDomainIOMMUModelTypeToString(iommu->model)); return -1; } + aw_bits_supported = virQEMUCapsGet(qemuCaps, QEMU_CAPS_VIRTIO_IOMMU_AW_BITS); break; case VIR_DOMAIN_IOMMU_MODEL_AMD: @@ -5670,8 +5674,7 @@ qemuValidateDomainDeviceDefIOMMU(const virDomainIOMMUDef *iommu, _("iommu: device IOTLB is not supported with this QEMU binary")); return -1; } - if (iommu->aw_bits > 0 && - !virQEMUCapsGet(qemuCaps, QEMU_CAPS_INTEL_IOMMU_AW_BITS)) { + if (iommu->aw_bits > 0 && !aw_bits_supported) { virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s", _("iommu: aw_bits is not supported with this QEMU binary")); return -1; diff --git a/tests/qemuxmlconfdata/virtio-iommu-aarch64.aarch64-latest.xml b/tests/qemuxmlconfdata/virtio-iommu-aarch64.aarch64-latest.xml index 3cb794cbc9..4ae628ab5a 100644 --- a/tests/qemuxmlconfdata/virtio-iommu-aarch64.aarch64-latest.xml +++ b/tests/qemuxmlconfdata/virtio-iommu-aarch64.aarch64-latest.xml @@ -29,6 +29,7 @@