From: Carl Love Date: Fri, 18 Oct 2013 01:20:11 +0000 (+0000) Subject: This commit adds testing support for the following instructions: X-Git-Tag: svn/VALGRIND_3_9_0~38 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=30565b278a9a852243479f9d21fab388db59fa80;p=thirdparty%2Fvalgrind.git This commit adds testing support for the following instructions: vaddcuq, vadduqm, vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm, vbpermq and vgbbd. The completes adding the Power ISA 2.07 support. Bugzilla 325816 VEX commit id 2790 git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13653 --- diff --git a/memcheck/mc_translate.c b/memcheck/mc_translate.c index a6b2959872..3476a1eb99 100644 --- a/memcheck/mc_translate.c +++ b/memcheck/mc_translate.c @@ -4152,6 +4152,9 @@ IRExpr* expr2vbits_Unop ( MCEnv* mce, IROp op, IRAtom* atom ) case Iop_Clz64x2: return mkPCast64x2(mce, vatom); + case Iop_PwBitMtxXpose64x2: + return assignNew('V', mce, Ity_V128, unop(op, vatom)); + case Iop_NarrowUn16to8x8: case Iop_NarrowUn32to16x4: case Iop_NarrowUn64to32x2: diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c index f2379549f8..0d080def2a 100644 --- a/memcheck/tests/vbit-test/irops.c +++ b/memcheck/tests/vbit-test/irops.c @@ -974,6 +974,7 @@ static irop_t irops[] = { { DEFOP(Iop_NCipherLV128, UNDEF_UNKNOWN), }, { DEFOP(Iop_SHA512, UNDEF_UNKNOWN), }, { DEFOP(Iop_SHA256, UNDEF_UNKNOWN), }, + { DEFOP(Iop_PwBitMtxXpose64x2, UNDEF_UNKNOWN), }, }; diff --git a/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp b/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp index 5dd38dfb6c..300b95cfd9 100644 --- a/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp +++ b/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp @@ -336,6 +336,9 @@ vpopcntd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 000000000000002d000000000000 vsbox: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 7c777bf26b6fc53001672bfeabd7ab76 vsbox: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> a1890dbfe6426841992d0fb0bb54bb16 +vgbbd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000000011e66aa00000000ff1f6ba5 +vgbbd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> ffffffff011e66aaffffffffff1f6ba5 + vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 088207870e8c098d || 8b9e1b9b13149015 vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> c8f5100c7844a0fc || e9b5916d0131c581 vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 592bfd4c0062b487 || fb4fb96f4cf02615 @@ -420,4 +423,65 @@ bcdsub.: 0000000000000000 || 0000000000000000 @@ 0000000000000000 || 00000000000 bcdsub.: 0000000000000000 || 0000000000000000 @@ 0000000000000000 || 0000000000000000 ==> 0000000000000000 || 000000000000000c bcdsub.: 0000000000000000 || 0000000000000000 @@ 0000000000000000 || 0000000000000000 ==> 0000000000000000 || 000000000000000f -All done. Tested 56 different instructions +vaddcuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000000 +vaddcuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 +vaddcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000000 +vaddcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000001 + +vadduqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 020406080a0c0e10121416181c1a1c1e +vadduqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> f2f4f6f8fafcff01030507090d0b0d0e +vadduqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> f2f4f6f8fafcff01030507090d0b0d0e +vadduqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> e3e5e7e9ebedeff1f3f5f7f9fdfbfdfe + +vsubcuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000001 +vsubcuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 +vsubcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000001 +vsubcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000001 + +vsubuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000000 +vsubuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f10 +vsubuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0 +vsubuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 + +vbpermq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 0000000000000000000000000000020a +vbpermq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 +vbpermq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> 0000000000000000000000000000e3ea +vbpermq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 + +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000000 +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000000 +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000000 +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000000 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000000 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000000 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000001 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000001 + +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 020406080a0c0e10121416181c1a1c1e +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 020406080a0c0e10121416181c1a1c1f +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> f2f4f6f8fafcff01030507090d0b0d0e +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> f2f4f6f8fafcff01030507090d0b0d0f +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> f2f4f6f8fafcff01030507090d0b0d0e +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> f2f4f6f8fafcff01030507090d0b0d0f +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> e3e5e7e9ebedeff1f3f5f7f9fdfbfdfe +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> e3e5e7e9ebedeff1f3f5f7f9fdfbfdff + +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000000 +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000001 +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000000 +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000000 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000001 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000001 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000000 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000001 + +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> ffffffffffffffffffffffffffffffff +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000000 +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f10 +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0ef +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0 +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> ffffffffffffffffffffffffffffffff +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000000 + +All done. Tested 66 different instructions diff --git a/none/tests/ppc64/jm_vec_isa_2_07.stdout.exp b/none/tests/ppc64/jm_vec_isa_2_07.stdout.exp index 2623b3ec2f..604cb7dd90 100644 --- a/none/tests/ppc64/jm_vec_isa_2_07.stdout.exp +++ b/none/tests/ppc64/jm_vec_isa_2_07.stdout.exp @@ -336,6 +336,9 @@ vpopcntd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 000000000000002d000000000000 vsbox: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 7c777bf26b6fc53001672bfeabd7ab76 vsbox: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> a1890dbfe6426841992d0fb0bb54bb16 +vgbbd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000000011e66aa00000000ff1f6ba5 +vgbbd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> ffffffff011e66aaffffffffff1f6ba5 + vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 088207870e8c098d || 8b9e1b9b13149015 vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> c8f5100c7844a0fc || e9b5916d0131c581 vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 592bfd4c0062b487 || fb4fb96f4cf02615 @@ -420,4 +423,65 @@ bcdsub.: 0000000000000000 || 0000000000000000 @@ 0000000000000000 || 00000000000 bcdsub.: 0000000000000000 || 0000000000000000 @@ 0000000000000000 || 0000000000000000 ==> 0000000000000000 || 000000000000000c bcdsub.: 0000000000000000 || 0000000000000000 @@ 0000000000000000 || 0000000000000000 ==> 0000000000000000 || 000000000000000f -All done. Tested 56 different instructions +vaddcuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000000 +vaddcuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 +vaddcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000000 +vaddcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000001 + +vadduqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 020406080a0c0e10121416181c1a1c1e +vadduqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> f2f4f6f8fafcff01030507090d0b0d0e +vadduqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> f2f4f6f8fafcff01030507090d0b0d0e +vadduqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> e3e5e7e9ebedeff1f3f5f7f9fdfbfdfe + +vsubcuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000001 +vsubcuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 +vsubcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000001 +vsubcuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000001 + +vsubuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 00000000000000000000000000000000 +vsubuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f10 +vsubuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0 +vsubuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 + +vbpermq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f ==> 0000000000000000000000000000020a +vbpermq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 +vbpermq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f ==> 0000000000000000000000000000e3ea +vbpermq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff ==> 00000000000000000000000000000000 + +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000000 +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000000 +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000000 +vaddecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000000 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000000 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000000 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000001 +vaddecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000001 + +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 020406080a0c0e10121416181c1a1c1e +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 020406080a0c0e10121416181c1a1c1f +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> f2f4f6f8fafcff01030507090d0b0d0e +vaddeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> f2f4f6f8fafcff01030507090d0b0d0f +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> f2f4f6f8fafcff01030507090d0b0d0e +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> f2f4f6f8fafcff01030507090d0b0d0f +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> e3e5e7e9ebedeff1f3f5f7f9fdfbfdfe +vaddeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> e3e5e7e9ebedeff1f3f5f7f9fdfbfdff + +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000000 +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000001 +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000000 +vsubecuq: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000000 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> 00000000000000000000000000000001 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000001 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 00000000000000000000000000000000 +vsubecuq: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000001 + +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> ffffffffffffffffffffffffffffffff +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> 00000000000000000000000000000000 +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> 0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f +vsubeuqm: 0102030405060708090a0b0c0e0d0e0f @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f10 +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000000 ==> f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0ef +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ 0102030405060708090a0b0c0e0d0e0f @@ f000000000000001 ==> f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0 +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000000 ==> ffffffffffffffffffffffffffffffff +vsubeuqm: f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f1f2f3f4f5f6f7f8f9fafbfcfefdfeff @@ f000000000000001 ==> 00000000000000000000000000000000 + +All done. Tested 66 different instructions diff --git a/none/tests/ppc64/test_isa_2_07_part1.c b/none/tests/ppc64/test_isa_2_07_part1.c index 067800d0b9..7cdf620c86 100644 --- a/none/tests/ppc64/test_isa_2_07_part1.c +++ b/none/tests/ppc64/test_isa_2_07_part1.c @@ -242,6 +242,7 @@ enum test_flags { PPC_ALTIVEC = 0x00040000, PPC_FALTIVEC = 0x00050000, PPC_ALTIVECD = 0x00060000, /* double word Altivec tests */ + PPC_ALTIVECQ = 0x00070000, PPC_FAMILY = 0x000F0000, /* Flags: these may be combined, so use separate bitfields. */ PPC_CR = 0x01000000, @@ -670,6 +671,74 @@ static void test_bcdsub (void) __asm__ __volatile__ ("bcdsub. %0, %1, %2, 0" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB)); } +static void test_vaddcuq (void) +{ + __asm__ __volatile__ ("vaddcuq %0, %1, %2" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB)); +} + +static void test_vadduqm (void) +{ + __asm__ __volatile__ ("vadduqm %0, %1, %2" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB)); +} + +static void test_vaddecuq (void) +{ + __asm__ __volatile__ ("vaddecuq %0, %1, %2, %3" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB),"v" (vec_inC)); +} + +static void test_vaddeuqm (void) +{ + __asm__ __volatile__ ("vaddeuqm %0, %1, %2, %3" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB),"v" (vec_inC)); +} + +static void test_vsubcuq (void) +{ + __asm__ __volatile__ ("vsubcuq %0, %1, %2" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB)); +} + +static void test_vsubuqm (void) +{ + __asm__ __volatile__ ("vsubuqm %0, %1, %2" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB)); +} + +static void test_vsubecuq (void) +{ + __asm__ __volatile__ ("vsubecuq %0, %1, %2, %3" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB),"v" (vec_inC)); +} + +static void test_vsubeuqm (void) +{ + __asm__ __volatile__ ("vsubeuqm %0, %1, %2, %3" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB),"v" (vec_inC)); +} + +static void test_vbpermq (void) +{ + __asm__ __volatile__ ("vbpermq %0, %1, %2" : "=v" (vec_out): "v" (vec_inA),"v" (vec_inB)); +} + +static void test_vgbbd (void) +{ + __asm__ __volatile__ ("vgbbd %0, %1" : "=v" (vec_out): "v" (vec_inB)); +} + + +static test_t tests_aa_quadword_two_args[] = { + { &test_vaddcuq , "vaddcuq" }, + { &test_vadduqm , "vadduqm" }, + { &test_vsubcuq , "vsubcuq" }, + { &test_vsubuqm , "vsubuqm" }, + { &test_vbpermq , "vbpermq" }, + { NULL , NULL }, +}; + +static test_t tests_aa_quadword_three_args[] = { + { &test_vaddecuq , "vaddecuq" }, + { &test_vaddeuqm , "vaddeuqm" }, + { &test_vsubecuq , "vsubecuq" }, + { &test_vsubeuqm , "vsubeuqm" }, + { NULL , NULL }, +}; + static test_t tests_aa_bcd_ops[] = { { &test_bcdadd , "bcdadd." }, { &test_bcdsub , "bcdsub." }, @@ -743,6 +812,7 @@ static test_t tests_aa_dbl_ops_one_arg[] = { { &test_vpopcntw , "vpopcntw" }, { &test_vpopcntd , "vpopcntd" }, { &test_vsbox , "vsbox" }, + { &test_vgbbd , "vgbbd" }, { NULL , NULL, } }; @@ -1151,6 +1221,7 @@ static void test_av_dint_two_args (const char* name, test_func_t func, unsigned long long * dst; unsigned int * dst_int; int i,j; + int family = test_flags & PPC_FAMILY; int is_vpkudum; if (strcmp(name, "vpkudum") == 0) is_vpkudum = 1; @@ -1175,6 +1246,10 @@ static void test_av_dint_two_args (const char* name, test_func_t func, vdargs[j+1] & 0x00000000ffffffffULL); printf(" Output: %08x %08x %08x %08x\n", dst_int[0], dst_int[1], dst_int[2], dst_int[3]); + } else if (family == PPC_ALTIVECQ) { + printf("%016llx%016llx @@ %016llx%016llx ==> %016llx%016llx\n", + vdargs[i], vdargs[i+1], vdargs[j], vdargs[j+1], + dst[0], dst[1]); } else { printf("%016llx @@ %016llx ", vdargs[i], vdargs[j]); printf(" ==> %016llx\n", dst[0]); @@ -1467,28 +1542,43 @@ static void test_int_ldq_three_regs (const char* name, } -static void test_av_int_three_args (const char* name, test_func_t func, - unused uint32_t test_flags) +static void test_av_dint_three_args (const char* name, test_func_t func, + unused uint32_t test_flags) { unsigned long long * dst; int i,j, k; + int family = test_flags & PPC_FAMILY; + unsigned long long cin_vals[] = { + // First pair of ULLs have LSB=0, so cin is '0'. + // Second pair of ULLs have LSB=1, so cin is '1'. + 0xf000000000000000ULL, 0xf000000000000000ULL, + 0xf000000000000000ULL, 0xf000000000000001ULL + }; for (i = 0; i < NB_VDARGS; i+=2) { vec_inA = (vector unsigned long long){ vdargs[i], vdargs[i+1] }; for (j = 0; j < NB_VDARGS; j+=2) { vec_inB = (vector unsigned long long){ vdargs[j], vdargs[j+1] }; - for (k = 0; k < NB_VDARGS; k+=2) { - vec_inC = (vector unsigned long long){ vdargs[k], vdargs[k+1] }; + for (k = 0; k < 4; k+=2) { + if (family == PPC_ALTIVECQ) + vec_inC = (vector unsigned long long){ cin_vals[k], cin_vals[k+1] }; + else + vec_inC = (vector unsigned long long){ vdargs[k], vdargs[k+1] }; vec_out = (vector unsigned long long){ 0,0 }; (*func)(); dst = (unsigned long long*)&vec_out; - printf("%s: ", name); - printf("%016llx @@ %016llx @@ %016llx ", vdargs[i], vdargs[j], vdargs[k]); - printf(" ==> %016llx\n", dst[0]); - printf("\t%016llx @@ %016llx @@ %016llx ", vdargs[i+1], vdargs[j+1], vdargs[k+1]); - printf(" ==> %016llx\n", dst[1]); + if (family == PPC_ALTIVECQ) { + printf("%016llx%016llx @@ %016llx%016llx @@ %llx ==> %016llx%016llx\n", + vdargs[i], vdargs[i+1], vdargs[j], vdargs[j+1], cin_vals[k+1], + dst[0], dst[1]); + } else { + printf("%016llx @@ %016llx @@ %016llx ", vdargs[i], vdargs[j], vdargs[k]); + printf(" ==> %016llx\n", dst[0]); + printf("\t%016llx @@ %016llx @@ %016llx ", vdargs[i+1], vdargs[j+1], vdargs[k+1]); + printf(" ==> %016llx\n", dst[1]); + } } } } @@ -1517,7 +1607,7 @@ static test_loop_t altivec_loops[] = { &test_av_wint_two_args_dres, &test_av_dint_to_int_two_args, &test_av_wint_one_arg_dres, - &test_av_int_three_args, + &test_av_dint_three_args, &test_av_dint_one_arg, &test_av_dint_one_arg_SHA, &test_av_bcd, @@ -1636,6 +1726,16 @@ static test_table_t all_tests[] = { "PPC altivec BCD insns", 0x00040B02, }, + { + tests_aa_quadword_two_args, + "PPC altivec quadword insns, two input args", + 0x00070102, + }, + { + tests_aa_quadword_three_args, + "PPC altivec quadword insns, three input args", + 0x00070103 + }, { NULL, NULL, 0x00000000, }, }; @@ -1676,6 +1776,7 @@ static void do_tests ( insn_sel_flags_t seln_flags, (family == PPC_FLOAT && !seln_flags.floats) || (family == PPC_ALTIVEC && !seln_flags.altivec) || (family == PPC_ALTIVECD && !seln_flags.altivec) || + (family == PPC_ALTIVECQ && !seln_flags.altivec) || (family == PPC_FALTIVEC && !seln_flags.faltivec)) { continue; } @@ -1700,6 +1801,12 @@ static void do_tests ( insn_sel_flags_t seln_flags, loop = &float_loops[nb_args - 1]; break; + case PPC_ALTIVECQ: + if (nb_args == 2) + loop = &altivec_loops[ALTV_DINT]; + else if (nb_args == 3) + loop = &altivec_loops[ALTV_DINT_THREE_ARGS]; + break; case PPC_ALTIVECD: switch (type) { case PPC_MOV: