From: Uros Bizjak Date: Sat, 26 Oct 2013 06:09:02 +0000 (+0200) Subject: backport: re PR target/58779 (wrong code at -O1 on x86_64-linux-gnu) X-Git-Tag: releases/gcc-4.7.4~432 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=30b818b6cf88350f2284a701026e681229a264f3;p=thirdparty%2Fgcc.git backport: re PR target/58779 (wrong code at -O1 on x86_64-linux-gnu) Backport from mainline 2013-10-22 Uros Bizjak PR target/58779 * config/i386/i386.c (put_condition_code) : Remove CCCmode handling. : Return 'c' suffix for CCCmode. : Return 'nc' suffix for CCCmode. (ix86_cc_mode) : Do not generate overflow checks. * config/i386/i386.md (*sub3_cconly_overflow): Remove. (*sub3_cc_overflow): Ditto. (*subsi3_zext_cc_overflow): Ditto. Backport from mainline 2013-10-19 Uros Bizjak PR target/58792 * config/i386/i386.c (ix86_function_value_regno): Add DX_REG, ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG and SI_REG for 64bit SYSV ABI targets. testsuite/ChangeLog: Backport from mainline 2013-10-22 Uros Bizjak PR target/58779 * gcc.target/i386/pr30315.c: Remove MINUSCC, DECCC, MINUSCCONLY and MINUSCCZEXT defines. Update scan-assembler dg directive. * gcc.dg/torture/pr58779.c: New test. From-SVN: r204088 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7f9c8a4a8800..fa169a163928 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,28 @@ +2013-10-26 Uros Bizjak + + Backport from mainline + 2013-10-22 Uros Bizjak + + PR target/58779 + * config/i386/i386.c (put_condition_code) : + Remove CCCmode handling. + : Return 'c' suffix for CCCmode. + : Return 'nc' suffix for CCCmode. + (ix86_cc_mode) : Do not generate overflow checks. + * config/i386/i386.md (*sub3_cconly_overflow): Remove. + (*sub3_cc_overflow): Ditto. + (*subsi3_zext_cc_overflow): Ditto. + +2013-10-26 Uros Bizjak + + Backport from mainline + 2013-10-19 Uros Bizjak + + PR target/58792 + * config/i386/i386.c (ix86_function_value_regno): Add DX_REG, + ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG + and SI_REG for 64bit SYSV ABI targets. + 2013-08-25 Richard Henderson PR rtl/58542 @@ -10,8 +35,8 @@ 2013-10-25 Eric Botcazou PR rtl-optimization/58831 - * alias.c (init_alias_analysis): At the beginning of each iteration, set - the reg_seen[N] flag if static_reg_base_value[N] is non-null. + * alias.c (init_alias_analysis): At the beginning of each iteration, + set the reg_seen[N] flag if static_reg_base_value[N] is non-null. 2013-10-25 Eric Botcazou diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 51d5120daced..4f700a381854 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -7129,9 +7129,15 @@ ix86_function_value_regno_p (const unsigned int regno) switch (regno) { case AX_REG: + case DX_REG: return true; + case DI_REG: + case SI_REG: + return TARGET_64BIT && ix86_abi != MS_ABI; - case FIRST_FLOAT_REG: + /* Complex values are returned in %st(0)/%st(1) pair. */ + case ST0_REG: + case ST1_REG: /* TODO: The function should depend on current function ABI but builtins.c would need updating then. Therefore we use the default ABI. */ @@ -7139,10 +7145,12 @@ ix86_function_value_regno_p (const unsigned int regno) return false; return TARGET_FLOAT_RETURNS_IN_80387; - case FIRST_SSE_REG: + /* Complex values are returned in %xmm0/%xmm1 pair. */ + case XMM0_REG: + case XMM1_REG: return TARGET_SSE; - case FIRST_MMX_REG: + case MM0_REG: if (TARGET_MACHO || TARGET_64BIT) return false; return TARGET_MMX; @@ -13654,8 +13662,6 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse, Those same assemblers have the same but opposite lossage on cmov. */ if (mode == CCmode) suffix = fp ? "nbe" : "a"; - else if (mode == CCCmode) - suffix = "b"; else gcc_unreachable (); break; @@ -13677,8 +13683,12 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse, } break; case LTU: - gcc_assert (mode == CCmode || mode == CCCmode); - suffix = "b"; + if (mode == CCmode) + suffix = "b"; + else if (mode == CCCmode) + suffix = "c"; + else + gcc_unreachable (); break; case GE: switch (mode) @@ -13698,20 +13708,20 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse, } break; case GEU: - /* ??? As above. */ - gcc_assert (mode == CCmode || mode == CCCmode); - suffix = fp ? "nb" : "ae"; + if (mode == CCmode) + suffix = fp ? "nb" : "ae"; + else if (mode == CCCmode) + suffix = "nc"; + else + gcc_unreachable (); break; case LE: gcc_assert (mode == CCmode || mode == CCGCmode || mode == CCNOmode); suffix = "le"; break; case LEU: - /* ??? As above. */ if (mode == CCmode) suffix = "be"; - else if (mode == CCCmode) - suffix = fp ? "nb" : "ae"; else gcc_unreachable (); break; @@ -18059,12 +18069,7 @@ ix86_cc_mode (enum rtx_code code, rtx op0, rtx op1) return CCmode; case GTU: /* CF=0 & ZF=0 */ case LEU: /* CF=1 | ZF=1 */ - /* Detect overflow checks. They need just the carry flag. */ - if (GET_CODE (op0) == MINUS - && rtx_equal_p (op1, XEXP (op0, 0))) - return CCCmode; - else - return CCmode; + return CCmode; /* Codes possibly doable only with sign flag when comparing against zero. */ case GE: /* SF=OF or SF=0 */ diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 747a68ef662e..bfcbb2e723c0 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -6555,7 +6555,7 @@ (set_attr "pent_pair" "pu") (set_attr "mode" "SI")]) -;; Overflow setting add and subtract instructions +;; Overflow setting add instructions (define_insn "*add3_cconly_overflow" [(set (reg:CCC FLAGS_REG) @@ -6570,43 +6570,31 @@ [(set_attr "type" "alu") (set_attr "mode" "")]) -(define_insn "*sub3_cconly_overflow" +(define_insn "*add3_cc_overflow" [(set (reg:CCC FLAGS_REG) (compare:CCC - (minus:SWI - (match_operand:SWI 0 "nonimmediate_operand" "m,") - (match_operand:SWI 1 "" ",m")) - (match_dup 0)))] - "" - "cmp{}\t{%1, %0|%0, %1}" - [(set_attr "type" "icmp") - (set_attr "mode" "")]) - -(define_insn "*3_cc_overflow" - [(set (reg:CCC FLAGS_REG) - (compare:CCC - (plusminus:SWI - (match_operand:SWI 1 "nonimmediate_operand" "0,0") + (plus:SWI + (match_operand:SWI 1 "nonimmediate_operand" "%0,0") (match_operand:SWI 2 "" ",m")) (match_dup 1))) (set (match_operand:SWI 0 "nonimmediate_operand" "=m,") - (plusminus:SWI (match_dup 1) (match_dup 2)))] - "ix86_binary_operator_ok (, mode, operands)" - "{}\t{%2, %0|%0, %2}" + (plus:SWI (match_dup 1) (match_dup 2)))] + "ix86_binary_operator_ok (PLUS, mode, operands)" + "add{}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "")]) -(define_insn "*si3_zext_cc_overflow" +(define_insn "*addsi3_zext_cc_overflow" [(set (reg:CCC FLAGS_REG) (compare:CCC - (plusminus:SI - (match_operand:SI 1 "nonimmediate_operand" "0") + (plus:SI + (match_operand:SI 1 "nonimmediate_operand" "%0") (match_operand:SI 2 "x86_64_general_operand" "rme")) (match_dup 1))) (set (match_operand:DI 0 "register_operand" "=r") - (zero_extend:DI (plusminus:SI (match_dup 1) (match_dup 2))))] - "TARGET_64BIT && ix86_binary_operator_ok (, SImode, operands)" - "{l}\t{%2, %k0|%k0, %2}" + (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))] + "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)" + "add{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 85a92113b86a..b5f751ac8607 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2013-10-26 Uros Bizjak + + Backport from mainline + 2013-10-22 Uros Bizjak + + PR target/58779 + * gcc.target/i386/pr30315.c: Remove MINUSCC, DECCC, MINUSCCONLY + and MINUSCCZEXT defines. Update scan-assembler dg directive. + * gcc.dg/torture/pr58779.c: New test. + 2013-10-25 Richard Henderson PR rtl/58542 @@ -290,7 +300,7 @@ Backport from mainline 2013-02-27 Andrey Belevantsev - + PR middle-end/45472 * gcc.dg/pr45472.c: New test. diff --git a/gcc/testsuite/gcc.dg/torture/pr58779.c b/gcc/testsuite/gcc.dg/torture/pr58779.c new file mode 100644 index 000000000000..b0c0c8695130 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr58779.c @@ -0,0 +1,12 @@ +/* { dg-do run } */ + +int a, c; + +int main () +{ + int e = -1; + short d = (c <= 0) ^ e; + if ((unsigned int) a - (a || d) <= (unsigned int) a) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr30315.c b/gcc/testsuite/gcc.target/i386/pr30315.c index 998d5071e5c0..557b4f75174e 100644 --- a/gcc/testsuite/gcc.target/i386/pr30315.c +++ b/gcc/testsuite/gcc.target/i386/pr30315.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ -/* { dg-final { scan-assembler-times "cmp" 4 } } */ +/* { dg-final { scan-assembler-not "cmp" } } */ extern void abort (void); int c; @@ -34,39 +34,10 @@ void pluscconly##t##C (T a, T b) \ } #define PLUSCCONLY(T, t) PLUSCCONLY1(T, t, a) PLUSCCONLY1(T, t, b) -#define MINUSCC(T, t) \ -T minuscc##t (T a, T b) \ -{ \ - T difference = a - b; \ - if (difference > a) \ - abort (); \ - return difference; \ -} - -#define DECCC(T, t) \ -T deccc##t (T a, T b) \ -{ \ - T difference = a - b; \ - if (difference > a) \ - c --; \ - return difference; \ -} - -#define MINUSCCONLY(T, t) \ -void minuscconly##t (T a, T b) \ -{ \ - T difference = a - b; \ - if (difference > a) \ - abort (); \ -} - #define TEST(T, t) \ PLUSCC(T, t) \ PLUSCCONLY(T, t) \ - INCCC(T, t) \ - MINUSCC(T, t) \ - MINUSCCONLY(T, t) \ - DECCC(T, t) + INCCC(T, t) TEST (unsigned long, l) TEST (unsigned int, i) @@ -84,14 +55,3 @@ unsigned long pluscczext##C (unsigned int a, unsigned int b) \ PLUSCCZEXT(a) PLUSCCZEXT(b) - -#define MINUSCCZEXT \ -unsigned long minuscczext (unsigned int a, unsigned int b) \ -{ \ - unsigned int difference = a - b; \ - if (difference > a) \ - abort (); \ - return difference; \ -} - -MINUSCCZEXT