From: Michal Wajdeczko Date: Mon, 18 May 2026 19:25:39 +0000 (+0200) Subject: drm/xe: Add IRQ page to HW engine definition X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=31f855a47c8beb8fee7d74374c9d21ba9ab06700;p=thirdparty%2Fkernel%2Flinux.git drm/xe: Add IRQ page to HW engine definition For each HW engine definition, we already make changes to the IRQ offset, as required when using MSI-X, but we leave actual MEMIRQ page selection to the MEMIRQ handler, repeated on every interrupt. As a preparation step to simplify the MEMIRQ handler, store the MEMIRQ page number as part of the HW engine definition. Suggested-by: Ilia Levi Signed-off-by: Michal Wajdeczko Cc: Ilia Levi Reviewed-by: Ilia Levi Link: https://patch.msgid.link/20260518192547.600-2-michal.wajdeczko@intel.com --- diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 05f0932dbb948..8c66ff6f3d3c6 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -514,9 +514,14 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, hwe->class = info->class; hwe->instance = info->instance; hwe->mmio_base = info->mmio_base; - hwe->irq_offset = xe_device_has_msix(gt_to_xe(gt)) ? - get_msix_irq_offset(gt, info->class) : - info->irq_offset; + if (xe_device_has_msix(gt_to_xe(gt))) { + hwe->irq_offset = get_msix_irq_offset(gt, info->class); + hwe->irq_page = info->instance; + + } else { + hwe->irq_offset = info->irq_offset; + hwe->irq_page = 0; + } hwe->domain = info->domain; hwe->name = info->name; hwe->fence_irq = >->fence_irq[info->class]; diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h index 0f87128c65290..2cf898e682f55 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h @@ -118,6 +118,8 @@ struct xe_hw_engine { u16 logical_instance; /** @irq_offset: IRQ offset of this hw engine */ u16 irq_offset; + /** @irq_page: MEMIRQ page used by this HW engine */ + u16 irq_page; /** @mmio_base: MMIO base address of this hw engine*/ u32 mmio_base; /**