From: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Date: Fri, 23 Sep 2022 18:38:45 +0000 (+0200)
Subject: Fix typo in chapter level for RISC-V attributes
X-Git-Tag: basepoints/gcc-14~4375
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=323c38c915f34883439e9e53b9eac5fe07cb8378;p=thirdparty%2Fgcc.git

Fix typo in chapter level for RISC-V attributes

The "RISC-V specific attributes" section should be at the same level
as "PowerPC-specific attributes".

gcc/ChangeLog:

	* doc/sourcebuild.texi: Fix chapter level.

Signed-off-by: Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
---

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 760ff9559a65..52357cc7aee9 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2447,7 +2447,7 @@ PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu}
 setting is Power9 or later.
 @end table
 
-@subsection RISC-V specific attributes
+@subsubsection RISC-V specific attributes
 
 @table @code