From: David Lechner Date: Wed, 1 Apr 2026 21:53:46 +0000 (-0500) Subject: arm: dts: mediatek: add USB/PHY nodes for Genio 520/720 X-Git-Tag: v2026.07-rc1~36^2~1 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=32dd41059c83621c71309a7972d4f0d8d2a070d4;p=thirdparty%2Fu-boot.git arm: dts: mediatek: add USB/PHY nodes for Genio 520/720 Add USB and PHY nodes for USB support on Genio 520/720 EVKs. The devicetree hasn't been accepted upstream yet, so this comes from the latest submission [1]. Some power domain and reset references have been left out to minimize what we need to add at this time since U-Boot doesn't need them. Link: https://lore.kernel.org/linux-mediatek/20251111070031.305281-10-jh.hsu@mediatek.com/ [1] Link: https://patch.msgid.link/20260401-mtk-mt8189-usb-v1-2-a4bf951aa8ad@baylibre.com Signed-off-by: David Lechner --- diff --git a/arch/arm/dts/mt8189.dtsi b/arch/arm/dts/mt8189.dtsi index e9fd21ea095..e550745ac5d 100644 --- a/arch/arm/dts/mt8189.dtsi +++ b/arch/arm/dts/mt8189.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include #include / { @@ -180,6 +181,79 @@ status = "disabled"; }; + xhci0: usb@11200000 { + compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x1000>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts-extended = <&gic GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH 0>, + <&pio 207 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host","wakeup"; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB0_SYS>, + <&pericfg_ao_clk CLK_PERAO_SSUSB0_REF>, + <&pericfg_ao_clk CLK_PERAO_SSUSB0_H>, + <&pericfg_ao_clk CLK_PERAO_SSUSB0_F>, + <&pericfg_ao_clk CLK_PERAO_SSUSB0_XHCI>, + <&pericfg_ao_clk CLK_PERAO_SSUSB0_FRMCNT>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", + "dma_ck", "xhci_ck", "frmcnt_ck"; + #address-cells = <1>; + #size-cells = <0>; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg_ao_clk 0x214 110>; + status = "disabled"; + }; + + xhci1: usb@11210000 { + compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11210000 0 0x1000>, + <0 0x11213e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts-extended = <&gic GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH 0>, + <&pio 203 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host","wakeup"; + phys = <&u2port1 PHY_TYPE_USB2>; + clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB1_SYS>, + <&pericfg_ao_clk CLK_PERAO_SSUSB1_REF>, + <&pericfg_ao_clk CLK_PERAO_SSUSB1_H>, + <&pericfg_ao_clk CLK_PERAO_SSUSB1_F>, + <&pericfg_ao_clk CLK_PERAO_SSUSB1_XHCI>, + <&pericfg_ao_clk CLK_PERAO_SSUSB1_FRMCNT>; + clock-names = "sys_ck", "ref_ck","mcu_ck", + "dma_ck", "xhci_ck", "frmcnt_ck"; + #address-cells = <1>; + #size-cells = <0>; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg_ao_clk 0x21c 110>; + status = "disabled"; + }; + + xhci2: usb@11220000 { + compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11220000 0 0x1000>, + <0 0x11223e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts-extended = <&gic GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH 0>, + <&pio 193 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host","wakeup"; + phys = <&u2port2 PHY_TYPE_USB2>; + clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB2_SYS>, + <&pericfg_ao_clk CLK_PERAO_SSUSB2_REF>, + <&pericfg_ao_clk CLK_PERAO_SSUSB2_H>, + <&pericfg_ao_clk CLK_PERAO_SSUSB2_F>, + <&pericfg_ao_clk CLK_PERAO_SSUSB2_XHCI>, + <&pericfg_ao_clk CLK_PERAO_SSUSB2_FRMCNT>; + clock-names = "sys_ck", "ref_ck","mcu_ck", + "dma_ck", "xhci_ck", "frmcnt_ck"; + #address-cells = <1>; + #size-cells = <0>; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg_ao_clk 0x27c 110>; + status = "disabled"; + }; + mmc0: mmc@11230000 { compatible = "mediatek,mt8189-mmc"; reg = <0 0x11230000 0 0x10000>, @@ -204,6 +278,55 @@ status = "disabled"; }; + xhci3: usb@11260000 { + compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11260000 0 0x2e00>, + <0 0x11263e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts-extended = <&gic GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH 0>, + <&pio 188 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host","wakeup"; + phys = <&u2port3 PHY_TYPE_USB2>, + <&u3port3 PHY_TYPE_USB3>; + clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB3_SYS>, + <&pericfg_ao_clk CLK_PERAO_SSUSB3_REF>, + <&pericfg_ao_clk CLK_PERAO_SSUSB3_H>, + <&pericfg_ao_clk CLK_PERAO_SSUSB3_F>, + <&pericfg_ao_clk CLK_PERAO_SSUSB3_XHCI>, + <&pericfg_ao_clk CLK_PERAO_SSUSB3_FRMCNT>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", + "dma_ck", "xhci_ck", "frmcnt_ck"; + #address-cells = <1>; + #size-cells = <0>; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg_ao_clk 0x284 110>; + status = "disabled"; + }; + + xhci4: usb@11270000 { + compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11270000 0 0x1000>, + <0 0x11273e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts-extended = <&gic GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH 0>, + <&pio 184 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host","wakeup"; + phys = <&u2port4 PHY_TYPE_USB2>; + clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB4_SYS>, + <&pericfg_ao_clk CLK_PERAO_SSUSB4_REF>, + <&pericfg_ao_clk CLK_PERAO_SSUSB4_H>, + <&pericfg_ao_clk CLK_PERAO_SSUSB4_F>, + <&pericfg_ao_clk CLK_PERAO_SSUSB4_XHCI>, + <&pericfg_ao_clk CLK_PERAO_SSUSB4_FRMCNT>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", + "dma_ck", "xhci_ck", "frmcnt_ck"; + #address-cells = <1>; + #size-cells = <0>; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg_ao_clk 0x28c 110>; + status = "disabled"; + }; + clock-controller@1000c000 { compatible = "mediatek,mt8189-apmixedsys", "syscon"; reg = <0 0x1000c000 0 0x1000>; @@ -359,6 +482,93 @@ status = "disabled"; }; + u3phy3: t-phy@11b00000 { + compatible = "mediatek,mt8189-tphy", + "mediatek,generic-tphy-v2"; + reg = <0 0x11b00000 0 0x700>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + u2port3: usb-phy@11b00000 { + reg = <0 0x11b00000 0 0x700>; + clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>; + clock-names = "ref"; + #phy-cells = <1>; + }; + + u3port3: usb-phy@11b00700 { + reg = <0 0x11b00700 0 0x700>; + clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + + u2phy4: xs-phy@11b10000 { + compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + u2port4: usb-phy@11b10000 { + reg = <0 0x11b10000 0 0x700>; + clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P4_EN>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + + u3phy0: xs-phy@11e80000 { + compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy"; + reg = <0 0x11e83000 0 0x200>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + u2port0: usb-phy@11e80000 { + reg = <0 0x11e80000 0 0x700>; + clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>; + clock-names = "ref"; + #phy-cells = <1>; + }; + + u3port0: usb-phy@11e83000 { + reg = <0 0x11e83400 0 0x500>; + clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + + u2phy1: xs-phy@11e90000 { + compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + u2port1: usb-phy@11e90000 { + reg = <0 0x11e90000 0 0x700>; + clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P1_EN>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + + u2phy2: xs-phy@11ef0000 { + compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + u2port2: usb-phy@11ef0000 { + reg = <0 0x11ef0000 0 0x700>; + clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P2_EN>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + ufscfg_ao_reg_clk: syscon@112b8000 { compatible = "mediatek,mt8189-ufscfg-ao", "syscon", "simple-mfd"; reg = <0 0x112b8000 0 0x1000>; diff --git a/arch/arm/dts/mt8371-genio-common.dtsi b/arch/arm/dts/mt8371-genio-common.dtsi index 58322193aef..046e9d57752 100644 --- a/arch/arm/dts/mt8371-genio-common.dtsi +++ b/arch/arm/dts/mt8371-genio-common.dtsi @@ -19,6 +19,51 @@ stdout-path = "serial0:921600n8"; }; + usb_p0_vbus: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "p0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 82 0>; + enable-active-high; + }; + + usb_p1_vbus: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "p1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 84 0>; + enable-active-high; + }; + + usb_p2_vbus: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "p2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 85 0>; + enable-active-high; + }; + + usb_p3_vbus: regulator@3 { + compatible = "regulator-fixed"; + regulator-name = "p3_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 86 0>; + enable-active-high; + }; + + usb_p4_vbus: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "p4_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 87 0>; + enable-active-high; + }; + firmware { optee { compatible = "linaro,optee-tz"; @@ -241,3 +286,28 @@ &pmic { interrupts-extended = <&pio 194 IRQ_TYPE_LEVEL_HIGH>; }; + +&xhci0{ + vbus-supply = <&usb_p0_vbus>; + status = "okay"; +}; + +&xhci1{ + vbus-supply = <&usb_p1_vbus>; + status = "okay"; +}; + +&xhci2{ + vbus-supply = <&usb_p2_vbus>; + status = "okay"; +}; + +&xhci3{ + vbus-supply = <&usb_p3_vbus>; + status = "okay"; +}; + +&xhci4{ + vbus-supply = <&usb_p4_vbus>; + status = "okay"; +};