From: Nathan Moinvaziri <nathan@nathanm.com>
Date: Thu, 8 Jan 2026 00:50:11 +0000 (-0800)
Subject: Add ARCH defines to code to make the ifdef logic easier
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3499e0dd05c7fe1b08001687f1df6983c4de5fb3;p=thirdparty%2Fzlib-ng.git

Add ARCH defines to code to make the ifdef logic easier
---

diff --git a/arch/arm/acle_intrins.h b/arch/arm/acle_intrins.h
index 0564e4166..16f5e2c77 100644
--- a/arch/arm/acle_intrins.h
+++ b/arch/arm/acle_intrins.h
@@ -9,7 +9,7 @@
 #endif
 
 #ifdef ARM_CRC32
-#if defined(__aarch64__)
+#if defined(ARCH_ARM) && defined(ARCH_64BIT)
 #  define Z_TARGET_CRC Z_TARGET("+crc")
 #else
 #  define Z_TARGET_CRC
@@ -21,7 +21,7 @@
 #endif
 
 #if !defined(ARM_CRC32_INTRIN) && !defined(_MSC_VER)
-#ifdef __aarch64__
+#if defined(ARCH_ARM) && defined(ARCH_64BIT)
 static inline uint32_t __crc32b(uint32_t __a, uint8_t __b) {
     uint32_t __c;
     __asm__("crc32b %w0, %w1, %w2" : "=r" (__c) : "r"(__a), "r"(__b));
diff --git a/arch/arm/arm_features.c b/arch/arm/arm_features.c
index de2c5a8a8..25dc18857 100644
--- a/arch/arm/arm_features.c
+++ b/arch/arm/arm_features.c
@@ -179,7 +179,7 @@ static int arm_has_eor3(void) {
 }
 
 /* AArch64 has neon. */
-#if !defined(__aarch64__) && !defined(_M_ARM64) && !defined(_M_ARM64EC)
+#if defined(ARCH_ARM) && defined(ARCH_32BIT)
 static inline int arm_has_neon(void) {
 #if defined(ARM_AUXV_HAS_NEON)
 #  if defined(__FreeBSD__) || defined(__OpenBSD__)
@@ -213,7 +213,7 @@ static inline int arm_has_neon(void) {
 #endif
 
 /* AArch64 does not have ARMv6 SIMD. */
-#if !defined(__aarch64__) && !defined(_M_ARM64) && !defined(_M_ARM64EC)
+#if defined(ARCH_ARM) && defined(ARCH_32BIT)
 static inline int arm_has_simd(void) {
 #if defined(__linux__) && defined(HAVE_SYS_AUXV_H)
     const char *platform = (const char *)getauxval(AT_PLATFORM);
@@ -310,7 +310,7 @@ static inline int arm_cpu_has_fast_pmull(void) {
 }
 
 void Z_INTERNAL arm_check_features(struct arm_cpu_features *features) {
-#if defined(__aarch64__) || defined(_M_ARM64) || defined(_M_ARM64EC)
+#if defined(ARCH_ARM) && defined(ARCH_64BIT)
     features->has_simd = 0; /* never available */
     features->has_neon = 1; /* always available */
 #else
diff --git a/arch/arm/chunkset_neon.c b/arch/arm/chunkset_neon.c
index e99dcf0e7..271f7f92b 100644
--- a/arch/arm/chunkset_neon.c
+++ b/arch/arm/chunkset_neon.c
@@ -50,7 +50,7 @@ static inline chunk_t GET_CHUNK_MAG(uint8_t *buf, uint32_t *chunk_rem, uint32_t
     __msan_unpoison(buf + dist, 16 - dist);
 
     /* This version of table is only available on aarch64 */
-#if defined(_M_ARM64) || defined(_M_ARM64EC) || defined(__aarch64__)
+#if defined(ARCH_ARM) && defined(ARCH_64BIT)
     uint8x16_t ret_vec = vld1q_u8(buf);
 
     uint8x16_t perm_vec = vld1q_u8(permute_table + lut_rem.idx);
diff --git a/arch/arm/neon_intrins.h b/arch/arm/neon_intrins.h
index a24887ce5..ac9c86bf4 100644
--- a/arch/arm/neon_intrins.h
+++ b/arch/arm/neon_intrins.h
@@ -1,14 +1,14 @@
 #ifndef ARM_NEON_INTRINS_H
 #define ARM_NEON_INTRINS_H
 
-#if defined(_MSC_VER) && (defined(_M_ARM64) || defined(_M_ARM64EC))
+#if defined(_MSC_VER) && defined(ARCH_ARM) && defined(ARCH_64BIT)
 /* arm64_neon.h is MSVC specific */
 #  include <arm64_neon.h>
 #else
 #  include <arm_neon.h>
 #endif
 
-#if defined(ARM_NEON) && !defined(__aarch64__) && !defined(_M_ARM64) && !defined(_M_ARM64EC)
+#if defined(ARM_NEON) && defined(ARCH_ARM) && defined(ARCH_32BIT)
 /* Compatibility shim for the _high family of functions */
 #define vmull_high_u8(a, b) vmull_u8(vget_high_u8(a), vget_high_u8(b))
 #define vmlal_high_u8(a, b, c) vmlal_u8(a, vget_high_u8(b), vget_high_u8(c))
@@ -25,7 +25,7 @@
     out.val[3] = vqsubq_u16(a.val[3], b); \
 } while (0)
 
-#  if defined(__arm__) && defined(__clang__) && \
+#  if defined(ARCH_ARM) && defined(ARCH_32BIT) && defined(__clang__) && \
     (!defined(__clang_major__) || __clang_major__ < 20)
 /* Clang versions before 20 have too strict of an
  * alignment requirement (:256) for x4 NEON intrinsics */
diff --git a/arch/x86/x86_functions.h b/arch/x86/x86_functions.h
index 725538470..9523ec0d6 100644
--- a/arch/x86/x86_functions.h
+++ b/arch/x86/x86_functions.h
@@ -87,7 +87,7 @@ uint32_t crc32_copy_vpclmulqdq(uint32_t crc, uint8_t *dst, const uint8_t *src, s
 
 #ifdef DISABLE_RUNTIME_CPU_DETECTION
 // X86 - SSE2
-#  if (defined(X86_SSE2) && defined(__SSE2__)) || defined(ARCH_64BIT)
+#  if (defined(X86_SSE2) && defined(__SSE2__)) || (defined(ARCH_X86) && defined(ARCH_64BIT))
 #    undef native_chunkmemset_safe
 #    define native_chunkmemset_safe chunkmemset_safe_sse2
 #    undef native_inflate_fast
diff --git a/arch/x86/x86_intrins.h b/arch/x86/x86_intrins.h
index d9354dc9c..1d1df5eb1 100644
--- a/arch/x86/x86_intrins.h
+++ b/arch/x86/x86_intrins.h
@@ -114,7 +114,7 @@ static inline __m128i _mm_cvtsi64_si128(int64_t a) {
 #endif
 #endif
 
-#if defined(__GNUC__) && defined(__i386__) && !defined(__clang__)
+#if defined(__GNUC__) && defined(ARCH_X86) && defined(ARCH_32BIT) && !defined(__clang__)
 static inline int64_t _mm_cvtsi128_si64(__m128i a) {
     union { __m128i v; int64_t i; } u;
     u.v = a;
diff --git a/cmake/detect-arch.cmake b/cmake/detect-arch.cmake
index bd81cb00d..f7ca6f1b8 100644
--- a/cmake/detect-arch.cmake
+++ b/cmake/detect-arch.cmake
@@ -43,6 +43,7 @@ string(TOLOWER "${ARCH}" ARCH)
 if("${ARCH}" MATCHES "(x86(_32|_64)?|amd64|x64|i[3-6]86)")
     set(BASEARCH "x86")
     set(BASEARCH_X86_FOUND TRUE)
+    add_compile_definitions(ARCH_X86)
     if("${ARCH}" MATCHES "(x86_64|amd64|x64)")
         set(ARCH_BITS 64)
     else()
@@ -51,6 +52,7 @@ if("${ARCH}" MATCHES "(x86(_32|_64)?|amd64|x64|i[3-6]86)")
 elseif("${ARCH}" MATCHES "(aarch64|arm64(ec)?|aarch32|arm(v[0-9])?|cortex)")
     set(BASEARCH "arm")
     set(BASEARCH_ARM_FOUND TRUE)
+    add_compile_definitions(ARCH_ARM)
     if("${ARCH}" MATCHES "(aarch64|arm64(ec)?)")
         set(ARCH_BITS 64)
     else()
@@ -59,6 +61,7 @@ elseif("${ARCH}" MATCHES "(aarch64|arm64(ec)?|aarch32|arm(v[0-9])?|cortex)")
 elseif("${ARCH}" MATCHES "(ppc|powerpc)(64)?(le)?")
     set(BASEARCH "ppc")
     set(BASEARCH_PPC_FOUND TRUE)
+    add_compile_definitions(ARCH_POWER)
     if("${ARCH}" MATCHES "(ppc|powerpc)64(le)?")
         set(ARCH_BITS 64)
     else()
@@ -67,18 +70,22 @@ elseif("${ARCH}" MATCHES "(ppc|powerpc)(64)?(le)?")
 elseif("${ARCH}" MATCHES "alpha")
     set(BASEARCH "alpha")
     set(BASEARCH_ALPHA_FOUND TRUE)
+    add_compile_definitions(ARCH_ALPHA)
     set(ARCH_BITS 64)
 elseif("${ARCH}" MATCHES "blackfin")
     set(BASEARCH "blackfin")
     set(BASEARCH_BLACKFIN_FOUND TRUE)
+    add_compile_definitions(ARCH_BLACKFIN)
     set(ARCH_BITS 32)
 elseif("${ARCH}" MATCHES "ia64")
     set(BASEARCH "ia64")
     set(BASEARCH_IA64_FOUND TRUE)
+    add_compile_definitions(ARCH_IA64)
     set(ARCH_BITS 64)
 elseif("${ARCH}" MATCHES "mips(isa)?(64)?")
     set(BASEARCH "mips")
     set(BASEARCH_MIPS_FOUND TRUE)
+    add_compile_definitions(ARCH_MIPS)
     if("${ARCH}" MATCHES "mips(isa)?64")
         set(ARCH_BITS 64)
     else()
@@ -87,14 +94,17 @@ elseif("${ARCH}" MATCHES "mips(isa)?(64)?")
 elseif("${ARCH}" MATCHES "m68k")
     set(BASEARCH "m68k")
     set(BASEARCH_M68K_FOUND TRUE)
+    add_compile_definitions(ARCH_M68K)
     set(ARCH_BITS 32)
 elseif("${ARCH}" MATCHES "sh")
     set(BASEARCH "sh")
     set(BASEARCH_SH_FOUND TRUE)
+    add_compile_definitions(ARCH_SH)
     set(ARCH_BITS 32)
 elseif("${ARCH}" MATCHES "sparc(v)?[89]?(64)?")
     set(BASEARCH "sparc")
     set(BASEARCH_SPARC_FOUND TRUE)
+    add_compile_definitions(ARCH_SPARC)
     if("${ARCH}" MATCHES "(sparc64|sparc(v)?9)")
         set(ARCH_BITS 64)
     else()
@@ -103,6 +113,7 @@ elseif("${ARCH}" MATCHES "sparc(v)?[89]?(64)?")
 elseif("${ARCH}" MATCHES "s3[679]0x?")
     set(BASEARCH "s360")
     set(BASEARCH_S360_FOUND TRUE)
+    add_compile_definitions(ARCH_S390)
     if("${ARCH}" MATCHES "s3[679]0x")
         set(ARCH_BITS 64)
     else()
@@ -111,6 +122,7 @@ elseif("${ARCH}" MATCHES "s3[679]0x?")
 elseif("${ARCH}" MATCHES "(parisc|hppa)(64)?")
     set(BASEARCH "parisc")
     set(BASEARCH_PARISC_FOUND TRUE)
+    add_compile_definitions(ARCH_PARISC)
     if("${ARCH}" MATCHES "(parisc|hppa)64")
         set(ARCH_BITS 64)
     else()
@@ -119,10 +131,12 @@ elseif("${ARCH}" MATCHES "(parisc|hppa)(64)?")
 elseif("${ARCH}" MATCHES "rs6000")
     set(BASEARCH "rs6000")
     set(BASEARCH_RS6000_FOUND TRUE)
+    add_compile_definitions(ARCH_RS6000)
     set(ARCH_BITS 32)
 elseif("${ARCH}" MATCHES "riscv(32|64)")
     set(BASEARCH "riscv")
     set(BASEARCH_RISCV_FOUND TRUE)
+    add_compile_definitions(ARCH_RISCV)
     if("${ARCH}" MATCHES "riscv64")
         set(ARCH_BITS 64)
     else()
@@ -131,10 +145,12 @@ elseif("${ARCH}" MATCHES "riscv(32|64)")
 elseif("${ARCH}" MATCHES "(loong64|loongarch64)")
     set(BASEARCH "loongarch")
     set(BASEARCH_LOONGARCH_FOUND TRUE)
+    add_compile_definitions(ARCH_LOONGARCH)
     set(ARCH_BITS 64)
 elseif("${ARCH}" MATCHES "wasm(32|64)")
     set(BASEARCH "wasm32")
     set(BASEARCH_WASM32_FOUND TRUE)
+    add_compile_definitions(ARCH_WASM)
     if("${ARCH}" MATCHES "wasm64")
         set(ARCH_BITS 64)
     else()
@@ -143,6 +159,7 @@ elseif("${ARCH}" MATCHES "wasm(32|64)")
 else()
     set(BASEARCH "x86")
     set(BASEARCH_X86_FOUND TRUE)
+    add_compile_definitions(ARCH_X86)
     set(ARCH_BITS 32)
     message(STATUS "Basearch '${ARCH}' not recognized, defaulting to 'x86'.")
 endif()
diff --git a/configure b/configure
index d45b26964..ac9202f7e 100755
--- a/configure
+++ b/configure
@@ -353,6 +353,7 @@ if test "$gcc" -eq 1 && ($cc $CFLAGS -c $test.c) >> configure.log 2>&1; then
         ARCH=$CC_ARCH
         ARCH_64BIT=1
       else
+        ARCH=i686
         ARCH_32BIT=1
       fi ;;
     arm | armeb)
@@ -1898,6 +1899,8 @@ case "${ARCH}" in
     # x86/amd64 specific optimizations
     i386 | i486 | i586 | i686 | amd64 | x86_64)
         ARCHDIR=arch/x86
+        CFLAGS="${CFLAGS} -DARCH_X86"
+        SFLAGS="${SFLAGS} -DARCH_X86"
 
         # Enable arch-specific optimizations
         if test $without_optimizations -eq 0; then
@@ -2026,6 +2029,8 @@ case "${ARCH}" in
         esac
 
         ARCHDIR=arch/arm
+        CFLAGS="${CFLAGS} -DARCH_ARM"
+        SFLAGS="${SFLAGS} -DARCH_ARM"
 
         cat > $test.c << EOF
 int main() { return 0; }
@@ -2263,6 +2268,8 @@ EOF
         esac
 
         ARCHDIR=arch/power
+        CFLAGS="${CFLAGS} -DARCH_POWER"
+        SFLAGS="${SFLAGS} -DARCH_POWER"
 
         if test $without_optimizations -eq 0; then
 
@@ -2312,6 +2319,8 @@ EOF
     riscv64)
         [ ! -z $CROSS_PREFIX ] && QEMU_ARCH=riscv64
         ARCHDIR=arch/riscv
+        CFLAGS="${CFLAGS} -DARCH_RISCV"
+        SFLAGS="${SFLAGS} -DARCH_RISCV"
 
         if test $without_optimizations -eq 0; then
             if test $buildrvv -eq 1 -o $buildzbc -eq 1; then
@@ -2350,6 +2359,8 @@ EOF
     s390x)
         [ ! -z $CROSS_PREFIX ] && QEMU_ARCH=s390x
         ARCHDIR=arch/s390
+        CFLAGS="${CFLAGS} -DARCH_S390"
+        SFLAGS="${SFLAGS} -DARCH_S390"
 
         if test $without_optimizations -eq 0; then
             if test $buildcrc32vx -eq 1; then
@@ -2390,6 +2401,8 @@ EOF
     # loongarch specific optimizations
     loongarch64)
         ARCHDIR=arch/loongarch
+        CFLAGS="${CFLAGS} -DARCH_LOONGARCH"
+        SFLAGS="${SFLAGS} -DARCH_LOONGARCH"
 
         # Enable arch-specific optimizations
         if test $without_optimizations -eq 0; then
diff --git a/fallback_builtins.h b/fallback_builtins.h
index e99d9f42d..fb7501cbb 100644
--- a/fallback_builtins.h
+++ b/fallback_builtins.h
@@ -2,7 +2,7 @@
 #define FALLBACK_BUILTINS_H
 
 #if defined(_MSC_VER) && !defined(__clang__)
-#if defined(_M_IX86) || defined(_M_AMD64) || defined(_M_IA64) ||  defined(_M_ARM) || defined(_M_ARM64) || defined(_M_ARM64EC)
+#if defined(ARCH_X86) || defined(ARCH_IA64) || defined(ARCH_ARM)
 
 #include <intrin.h>
 
@@ -41,7 +41,7 @@ Z_FORCEINLINE static int __builtin_ctzll(unsigned long long value) {
 #define HAVE_BUILTIN_CTZLL
 #endif // ARCH_64BIT
 
-#endif // Microsoft AMD64/IA64/x86/ARM/ARM64 test
+#endif // ARCH_X86 || ARCH_IA64 || ARCH_ARM
 #endif // _MSC_VER & !clang
 
 #ifndef HAVE_BUILTIN_BITREVERSE16
diff --git a/functable.c b/functable.c
index 9ea12fdaf..0e8911e16 100644
--- a/functable.c
+++ b/functable.c
@@ -22,7 +22,7 @@
 #elif defined(_MSC_VER)
 #  define FUNCTABLE_ASSIGN(VAR, FUNC_NAME) \
     _InterlockedExchangePointer((void * volatile *)&(functable.FUNC_NAME), (void *)(VAR.FUNC_NAME))
-#  if defined(_M_ARM) || defined(_M_ARM64)
+#  ifdef ARCH_ARM
 #    define FUNCTABLE_BARRIER() do { \
     _ReadWriteBarrier();  \
     __dmb(0xB); /* _ARM_BARRIER_ISH */ \
@@ -77,7 +77,7 @@ static int init_functable(void) {
 
     // Set up generic C code fallbacks
 #ifndef WITH_ALL_FALLBACKS
-#  if defined(ARCH_64BIT) && defined(X86_SSE2)
+#  if defined(ARCH_X86) && defined(ARCH_64BIT) && defined(X86_SSE2)
     // x86_64 always has SSE2, so we can use SSE2 functions as fallbacks where available.
     ft.adler32 = &adler32_c;
     ft.adler32_copy = &adler32_copy_c;
diff --git a/inflate_p.h b/inflate_p.h
index fad4b53fc..4f0564147 100644
--- a/inflate_p.h
+++ b/inflate_p.h
@@ -73,7 +73,7 @@
 #endif
 
 /* Compiler optimization for bit accumulator on x86 architectures */
-#if defined(__x86_64__) || defined(__i386__)
+#ifdef ARCH_X86
 typedef uint8_t bits_t;
 #else
 typedef unsigned bits_t;
diff --git a/zbuild.h b/zbuild.h
index 91e4d498a..954bad316 100644
--- a/zbuild.h
+++ b/zbuild.h
@@ -130,7 +130,8 @@
 /* Force the compiler to treat variable as modified. Empty asm statement with a "+r" constraint prevents
    the compiler from reordering or eliminating loads into the variable. This can help keep critical latency
    chains in the hot path from being shortened or optimized away. */
-#if (defined(__GNUC__) || defined(__clang__)) && (defined(__x86_64__) || defined(__i386__) || defined(__aarch64__))
+#if (defined(__GNUC__) || defined(__clang__)) && \
+        (defined(ARCH_X86) || (defined(ARCH_ARM) && defined(ARCH_64BIT)))
 #  define Z_TOUCH(var) __asm__ ("" : "+r"(var))
 #else
 #  define Z_TOUCH(var) (void)(var)
@@ -288,7 +289,7 @@
  */
 #if !defined(OPTIMAL_CMP)
 #  ifdef ARCH_64BIT
-#    if defined(__aarch64__) || defined(_M_ARM64) || defined(_M_ARM64EC)
+#    ifdef ARCH_ARM
 #      if defined(__ARM_FEATURE_UNALIGNED) || defined(_WIN32)
 #        define OPTIMAL_CMP 64
 #      else
@@ -298,7 +299,7 @@
 #      define OPTIMAL_CMP 64
 #    endif
 #  elif defined(ARCH_32BIT)
-#    if defined(__arm__) || defined(_M_ARM)
+#    ifdef ARCH_ARM
 #      if defined(__ARM_FEATURE_UNALIGNED) || defined(_WIN32)
 #        define OPTIMAL_CMP 32
 #      else
diff --git a/zendian.h b/zendian.h
index 28177a609..bdf4e91dd 100644
--- a/zendian.h
+++ b/zendian.h
@@ -27,7 +27,7 @@
 #elif defined(_WIN32)
 #  define LITTLE_ENDIAN 1234
 #  define BIG_ENDIAN 4321
-#  if defined(_M_IX86) || defined(_M_AMD64) || defined(_M_IA64) || defined (_M_ARM) || defined (_M_ARM64) || defined (_M_ARM64EC)
+#  if defined(ARCH_X86) || defined(ARCH_IA64) || defined(ARCH_ARM)
 #    define BYTE_ORDER LITTLE_ENDIAN
 #  else
 #    error Unknown endianness!