From: Petar Jovanovic <mips32r2@gmail.com>
Date: Tue, 14 Jan 2020 17:37:21 +0000 (+0000)
Subject: mips: Fix BEQC[16] and BNEC[16] instructions for nanoMIPS
X-Git-Tag: VALGRIND_3_16_0~139
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3501c118dfb9b4fbd3bd005f30e2cafc65f6fed8;p=thirdparty%2Fvalgrind.git

mips: Fix BEQC[16] and BNEC[16] instructions for nanoMIPS

Instruction decoding was not correct. In some cases, BEQC has been decoded
as BNEC and vice versa.

It caused problems with musl malloc() function.

Patch by Stefan Maksimovic.
---

diff --git a/VEX/priv/guest_nanomips_toIR.c b/VEX/priv/guest_nanomips_toIR.c
index f06370ffd6..0cc80b0aa2 100755
--- a/VEX/priv/guest_nanomips_toIR.c
+++ b/VEX/priv/guest_nanomips_toIR.c
@@ -2201,10 +2201,12 @@ static void nano_p16br(DisResult *dres, UShort cins)
       putPC(getIReg(rt));
       dres->whatNext = Dis_StopHere;
    } else {
-      UChar rt = GPR3_list[(cins >> 7) & 0x07];
-      UChar rs = GPR3_list[(cins >> 4) & 0x07];
+      UChar rt3 = (cins >> 7) & 0x07;
+      UChar rs3 = (cins >> 4) & 0x07;
+      UChar rt = GPR3_list[rt3];
+      UChar rs = GPR3_list[rs3];
 
-      if (rs < rt) {  /* beqc[16] */
+      if (rs3 < rt3) {  /* beqc[16] */
          DIP("beqc r%u, r%u, %X", rt, rs, guest_PC_curr_instr + 2 + u);
          ir_for_branch(dres, binop(Iop_CmpEQ32, getIReg(rt), getIReg(rs)),
                        2, (Int)u);