From: Richard Henderson Date: Wed, 8 Oct 2025 21:55:26 +0000 (-0700) Subject: target/arm: Convert regime_is_stage2 to table X-Git-Tag: v10.2.0-rc1~67^2~50 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=35ba9340114dc6122f5e7b65565a85795c2dc7d7;p=thirdparty%2Fqemu.git target/arm: Convert regime_is_stage2 to table This wasn't using a switch, but two comparisons. Convert it to arm_mmuidx_table for consistency. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-id: 20251008215613.300150-27-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- diff --git a/target/arm/internals.h b/target/arm/internals.h index 92883b6c0e..591b509e68 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1027,11 +1027,6 @@ static inline void arm_call_el_change_hook(ARMCPU *cpu) } } -static inline bool regime_is_stage2(ARMMMUIdx mmu_idx) -{ - return mmu_idx == ARMMMUIdx_Stage2 || mmu_idx == ARMMMUIdx_Stage2_S; -} - /* Return the SCTLR value which controls this address translation regime */ static inline uint64_t regime_sctlr(CPUARMState *env, ARMMMUIdx mmu_idx) { diff --git a/target/arm/mmuidx-internal.h b/target/arm/mmuidx-internal.h index 55fba4aae2..1d948aa6f4 100644 --- a/target/arm/mmuidx-internal.h +++ b/target/arm/mmuidx-internal.h @@ -19,6 +19,7 @@ FIELD(MMUIDXINFO, 2RANGES, 6, 1) FIELD(MMUIDXINFO, PAN, 7, 1) FIELD(MMUIDXINFO, USER, 8, 1) FIELD(MMUIDXINFO, STAGE1, 9, 1) +FIELD(MMUIDXINFO, STAGE2, 10, 1) extern const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8]; @@ -84,4 +85,11 @@ static inline bool arm_mmu_idx_is_stage1_of_2(ARMMMUIdx idx) return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, STAGE1); } +/* Return true if this mmu index is stage 2 of a 2-stage translation. */ +static inline bool regime_is_stage2(ARMMMUIdx idx) +{ + tcg_debug_assert(arm_mmuidx_is_valid(idx)); + return FIELD_EX32(arm_mmuidx_table[idx], MMUIDXINFO, STAGE2); +} + #endif /* TARGET_ARM_MMUIDX_INTERNAL_H */ diff --git a/target/arm/mmuidx.c b/target/arm/mmuidx.c index c5b43a5932..61a682e655 100644 --- a/target/arm/mmuidx.c +++ b/target/arm/mmuidx.c @@ -14,6 +14,7 @@ #define PAN R_MMUIDXINFO_PAN_MASK #define USER R_MMUIDXINFO_USER_MASK #define S1 R_MMUIDXINFO_STAGE1_MASK +#define S2 R_MMUIDXINFO_STAGE2_MASK const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8] = { /* @@ -33,8 +34,8 @@ const uint32_t arm_mmuidx_table[ARM_MMU_IDX_M + 8] = { [ARMMMUIdx_E30_0] = EL(0) | REL(3), [ARMMMUIdx_E30_3_PAN] = EL(3) | REL(3) | PAN, - [ARMMMUIdx_Stage2_S] = REL(2), - [ARMMMUIdx_Stage2] = REL(2), + [ARMMMUIdx_Stage2_S] = REL(2) | S2, + [ARMMMUIdx_Stage2] = REL(2) | S2, [ARMMMUIdx_Stage1_E0] = REL(1) | R2 | S1 | USER, [ARMMMUIdx_Stage1_E1] = REL(1) | R2 | S1,