From: Le Ma Date: Wed, 20 Apr 2022 15:25:48 +0000 (+0800) Subject: drm/amdgpu: program GRBM_MCM_ADDR for non-AID0 GRBM X-Git-Tag: v6.5-rc1~153^2~7^2~566 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=36be0181eab50abbb043a087988e6c2bef59dd45;p=thirdparty%2Fkernel%2Flinux.git drm/amdgpu: program GRBM_MCM_ADDR for non-AID0 GRBM Otherwise the EOP interrupt on non-AID0 cannot route to IH0. Signed-off-by: Le Ma Acked-by: Felix Kuehling Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 1dcb69b4816f9..a9fab8de29e89 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -184,7 +184,10 @@ static void gfx_v9_4_3_set_kiq_pm4_funcs(struct amdgpu_device *adev) static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev) { + int i; + for (i = 2; i < adev->gfx.num_xcd; i++) + WREG32_SOC15(GC, i, regGRBM_MCM_ADDR, 0x4); } static void gfx_v9_4_3_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel,