From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 10 Feb 2026 09:11:16 +0000 (+0000)
Subject: Merge tag 'single-binary-20260206' of https://github.com/philmd/qemu into staging
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=37daf4ec82411f7c65b3287cf6b2c27a128cec3b;p=thirdparty%2Fqemu.git

Merge tag 'single-binary-20260206' of https://github.com/philmd/qemu into staging

Various patches related to single binary effort:

- Reduce RISC-V Boston tests
- Prohibit target_ulong / TARGET_PAGE_SIZE uses on s390x target
- Build target/arm/arm-qmp-cmds once
- Forbid legacy native endianness & ld/st_phys APIs on SPARC targets
- Forbid legacy ld/st_phys APIs on x86 targets
- Rename OpenRISC -> or1k
- Avoid QAPI parsing in target_arch()

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmmKO5wACgkQ4+MsLN6t
# wN5EchAAxWVK1eWW5cO7R3+PxWFFzAMcyTzVUftNIyMLZQcXg5C6P2MSt8gsU8KC
# oOwl9S85u5dYh/PlAJtQYC+wtNUxawaJk26vUm3k+uOY2XgqCLtFKts+id15F3Hb
# RueLTEM095jbFgl5OzDwFVRAXP/z727vRsSN2ULXdphHpSVnrROGLz++Uqn7wAmd
# S9u8q35VVRkHl5TRQBDCYNddvGkW6PY0lSdDPhPMYFDH0Pln1Ao3fEn1zfa1c2gP
# HQ1d4MdHi8XX041o2TPFZf74tEs0EeSaxBtfyFEMByOs2kVe8oiX5oaM37vbejLa
# WAfwkG1imw9LcMo0VyjMGgQMb0tkdCVJWzp47eEAEhxSHBsfX5w7+jG0pBng3BBJ
# 6BrcfzVcWeqScUJPdXbM+mY+uBW09JHsTH37aM1NCsRlJI3gys2TfY/oIyVb7aqM
# C17DPKwxv+LVC5BI8LPAkh/nM2/sh5jtC+DjqaAFfAlo3JPLIUOcEIpFikiGbbzU
# MFH1k6YRAee3e7fW1Sw26R17Sf+VTYO9EhYiyWdyAIaBPZ5r7V/fVZWNNrBvh3Zd
# +ETHyRr/mwxbPx3fiNRg880jsP6mVhpLqykRJN1ttW0eQPaA96aqLmDrez/NFF4D
# NisJI8nlJNSEnF84cKgpV74mbIM5lmwMQi684rnI/Ty31X1hLxU=
# =dY6o
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon Feb  9 19:55:08 2026 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'single-binary-20260206' of https://github.com/philmd/qemu: (30 commits)
  target-info: Statically initialize target_arch
  meson: Add TARGET_ARCH to config_target_data
  qapi: Add hexagon to SysEmuTarget
  hw/or1k: Rename or1k-sim.c from openrisc_sim.c
  docs/system/or1k: Rename from openrisc
  tests/tcg/or1k: Rename from openrisc
  hw/or1k: Rename from openrisc
  include/hw/or1k: Rename from openrisc
  target/or1k: Rename from openrisc
  configs/targets: Restrict the legacy ldst_phys() API on x86 targets
  hw/intc/ioapic: Replace legacy st_phys() -> address_space_st()
  hw/intc: Mark x86-specific [IO]APIC peripherals as little-endian
  target/i386: Use explicit little-endian LD/ST API
  configs/targets: Restrict legacy ldst_phys() API on 32-bit SPARC target
  target/sparc: Replace legacy st_phys() -> address_space_st()
  configs/targets: Forbid SPARC to use legacy native endianness APIs
  target/sparc: Replace MO_TE -> MO_BE
  target/sparc: Remove dubious swapping in LD_code() helper
  target/arm/arm-qmp-cmds.c: make compilation unit common
  target/s390x: Expand tcg_global_mem_new() -> tcg_global_mem_new_i64()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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37daf4ec82411f7c65b3287cf6b2c27a128cec3b