From: Florian Krohm Date: Sun, 26 Aug 2012 03:20:07 +0000 (+0000) Subject: Followup to r2483, purely mechanical. Rename: X-Git-Tag: svn/VALGRIND_3_9_0^2~277 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=38906a631fef96ec14e6e717a56e8d0b609f2c51;p=thirdparty%2Fvalgrind.git Followup to r2483, purely mechanical. Rename: VexEmWarn -> VexEmNote EmWarn_NUMBER -> EmNote_NUMBER guest_EMWARN -> guest_EMNOTE LibVEX_EmWarn_string -> LibVEX_EmNote_string offB_EMWARN -> offB_EMNOTE EmWarn_NONE -> EmNote_NONE git-svn-id: svn://svn.valgrind.org/vex/trunk@2484 --- diff --git a/VEX/priv/guest_amd64_defs.h b/VEX/priv/guest_amd64_defs.h index 396bd6dce1..6ad81d221b 100644 --- a/VEX/priv/guest_amd64_defs.h +++ b/VEX/priv/guest_amd64_defs.h @@ -117,9 +117,9 @@ extern ULong amd64g_check_ldmxcsr ( ULong mxcsr ); extern ULong amd64g_create_mxcsr ( ULong sseround ); -extern VexEmWarn amd64g_dirtyhelper_FLDENV ( VexGuestAMD64State*, HWord ); -extern VexEmWarn amd64g_dirtyhelper_FRSTOR ( VexGuestAMD64State*, HWord ); -extern VexEmWarn amd64g_dirtyhelper_FRSTORS ( VexGuestAMD64State*, HWord ); +extern VexEmNote amd64g_dirtyhelper_FLDENV ( VexGuestAMD64State*, HWord ); +extern VexEmNote amd64g_dirtyhelper_FRSTOR ( VexGuestAMD64State*, HWord ); +extern VexEmNote amd64g_dirtyhelper_FRSTORS ( VexGuestAMD64State*, HWord ); extern void amd64g_dirtyhelper_FSTENV ( VexGuestAMD64State*, HWord ); extern void amd64g_dirtyhelper_FNSAVE ( VexGuestAMD64State*, HWord ); @@ -165,7 +165,7 @@ extern void amd64g_dirtyhelper_CPUID_avx_and_cx16 ( VexGuestAMD64State* st ); extern void amd64g_dirtyhelper_FINIT ( VexGuestAMD64State* ); extern void amd64g_dirtyhelper_FXSAVE ( VexGuestAMD64State*, HWord ); -extern VexEmWarn amd64g_dirtyhelper_FXRSTOR ( VexGuestAMD64State*, HWord ); +extern VexEmNote amd64g_dirtyhelper_FXRSTOR ( VexGuestAMD64State*, HWord ); extern ULong amd64g_dirtyhelper_RDTSC ( void ); @@ -277,12 +277,12 @@ extern void amd64g_dirtyhelper_AESKEYGENASSIST ( //extern void amd64g_dirtyhelper_FSAVE ( VexGuestAMD64State*, HWord ); -//extern VexEmWarn +//extern VexEmNote // amd64g_dirtyhelper_FRSTOR ( VexGuestAMD64State*, HWord ); //extern void amd64g_dirtyhelper_FSTENV ( VexGuestAMD64State*, HWord ); -//extern VexEmWarn +//extern VexEmNote // amd64g_dirtyhelper_FLDENV ( VexGuestAMD64State*, HWord ); diff --git a/VEX/priv/guest_amd64_helpers.c b/VEX/priv/guest_amd64_helpers.c index 6084dacf32..5f95e45dbb 100644 --- a/VEX/priv/guest_amd64_helpers.c +++ b/VEX/priv/guest_amd64_helpers.c @@ -1531,7 +1531,7 @@ ULong amd64g_calculate_FXAM ( ULong tag, ULong dbl ) appears to differ from the former only in that the 8 FP registers themselves are not transferred into the guest state. */ static -VexEmWarn do_put_x87 ( Bool moveRegs, +VexEmNote do_put_x87 ( Bool moveRegs, /*IN*/UChar* x87_state, /*OUT*/VexGuestAMD64State* vex_state ) { @@ -1544,7 +1544,7 @@ VexEmWarn do_put_x87 ( Bool moveRegs, UInt tagw = x87->env[FP_ENV_TAG]; UInt fpucw = x87->env[FP_ENV_CTRL]; UInt c3210 = x87->env[FP_ENV_STAT] & 0x4700; - VexEmWarn ew; + VexEmNote ew; UInt fpround; ULong pair; @@ -1580,7 +1580,7 @@ VexEmWarn do_put_x87 ( Bool moveRegs, emulation warnings. */ pair = amd64g_check_fldcw ( (ULong)fpucw ); fpround = (UInt)pair & 0xFFFFFFFFULL; - ew = (VexEmWarn)(pair >> 32); + ew = (VexEmNote)(pair >> 32); vex_state->guest_FPROUND = fpround & 3; @@ -1747,11 +1747,11 @@ void amd64g_dirtyhelper_FXSAVE ( VexGuestAMD64State* gst, HWord addr ) /* CALLED FROM GENERATED CODE */ /* DIRTY HELPER (writes guest state, reads guest mem) */ -VexEmWarn amd64g_dirtyhelper_FXRSTOR ( VexGuestAMD64State* gst, HWord addr ) +VexEmNote amd64g_dirtyhelper_FXRSTOR ( VexGuestAMD64State* gst, HWord addr ) { Fpu_State tmp; - VexEmWarn warnX87 = EmWarn_NONE; - VexEmWarn warnXMM = EmWarn_NONE; + VexEmNote warnX87 = EmNote_NONE; + VexEmNote warnXMM = EmNote_NONE; UShort* addrS = (UShort*)addr; UChar* addrC = (UChar*)addr; U128* xmm = (U128*)(addr + 160); @@ -1820,13 +1820,13 @@ VexEmWarn amd64g_dirtyhelper_FXRSTOR ( VexGuestAMD64State* gst, HWord addr ) | ((((UInt)addrS[13]) & 0xFFFF) << 16); ULong w64 = amd64g_check_ldmxcsr( (ULong)w32 ); - warnXMM = (VexEmWarn)(w64 >> 32); + warnXMM = (VexEmNote)(w64 >> 32); gst->guest_SSEROUND = w64 & 0xFFFFFFFFULL; } /* Prefer an X87 emwarn over an XMM one, if both exist. */ - if (warnX87 != EmWarn_NONE) + if (warnX87 != EmNote_NONE) return warnX87; else return warnXMM; @@ -1878,7 +1878,7 @@ ULong amd64g_check_ldmxcsr ( ULong mxcsr ) ULong rmode = (mxcsr >> 13) & 3; /* Detect any required emulation warnings. */ - VexEmWarn ew = EmWarn_NONE; + VexEmNote ew = EmNote_NONE; if ((mxcsr & 0x1F80) != 0x1F80) { /* unmasked exceptions! */ @@ -1922,7 +1922,7 @@ ULong amd64g_check_fldcw ( ULong fpucw ) ULong rmode = (fpucw >> 10) & 3; /* Detect any required emulation warnings. */ - VexEmWarn ew = EmWarn_NONE; + VexEmNote ew = EmNote_NONE; if ((fpucw & 0x3F) != 0x3F) { /* unmasked exceptions! */ @@ -1952,7 +1952,7 @@ ULong amd64g_create_fpucw ( ULong fpround ) Reads 28 bytes at x87_state[0 .. 27]. */ /* CALLED FROM GENERATED CODE */ /* DIRTY HELPER */ -VexEmWarn amd64g_dirtyhelper_FLDENV ( /*OUT*/VexGuestAMD64State* vex_state, +VexEmNote amd64g_dirtyhelper_FLDENV ( /*OUT*/VexGuestAMD64State* vex_state, /*IN*/HWord x87_state) { return do_put_x87( False, (UChar*)x87_state, vex_state ); @@ -2058,7 +2058,7 @@ void amd64g_dirtyhelper_FNSAVES ( /*IN*/VexGuestAMD64State* vex_state, Reads 108 bytes at x87_state[0 .. 107]. */ /* CALLED FROM GENERATED CODE */ /* DIRTY HELPER */ -VexEmWarn amd64g_dirtyhelper_FRSTOR ( /*OUT*/VexGuestAMD64State* vex_state, +VexEmNote amd64g_dirtyhelper_FRSTOR ( /*OUT*/VexGuestAMD64State* vex_state, /*IN*/HWord x87_state) { return do_put_x87( True, (UChar*)x87_state, vex_state ); @@ -2069,7 +2069,7 @@ VexEmWarn amd64g_dirtyhelper_FRSTOR ( /*OUT*/VexGuestAMD64State* vex_state, Reads 94 bytes at x87_state[0 .. 93]. */ /* CALLED FROM GENERATED CODE */ /* DIRTY HELPER */ -VexEmWarn amd64g_dirtyhelper_FRSTORS ( /*OUT*/VexGuestAMD64State* vex_state, +VexEmNote amd64g_dirtyhelper_FRSTORS ( /*OUT*/VexGuestAMD64State* vex_state, /*IN*/HWord x87_state) { Int stno, preg; @@ -2081,7 +2081,7 @@ VexEmWarn amd64g_dirtyhelper_FRSTORS ( /*OUT*/VexGuestAMD64State* vex_state, UInt tagw = x87->env[FPS_ENV_TAG]; UInt fpucw = x87->env[FPS_ENV_CTRL]; UInt c3210 = x87->env[FPS_ENV_STAT] & 0x4700; - VexEmWarn ew; + VexEmNote ew; UInt fpround; ULong pair; @@ -2115,7 +2115,7 @@ VexEmWarn amd64g_dirtyhelper_FRSTORS ( /*OUT*/VexGuestAMD64State* vex_state, emulation warnings. */ pair = amd64g_check_fldcw ( (ULong)fpucw ); fpround = (UInt)pair & 0xFFFFFFFFULL; - ew = (VexEmWarn)(pair >> 32); + ew = (VexEmNote)(pair >> 32); vex_state->guest_FPROUND = fpround & 3; @@ -3699,7 +3699,7 @@ void LibVEX_GuestAMD64_initialise ( /*OUT*/VexGuestAMD64State* vex_state ) # undef AVXZERO - vex_state->guest_EMWARN = EmWarn_NONE; + vex_state->guest_EMNOTE = EmNote_NONE; /* These should not ever be either read or written, but we initialise them anyway. */ @@ -3807,7 +3807,7 @@ VexGuestLayout // /* */ ALWAYSDEFD(guest_SS), // /* */ ALWAYSDEFD(guest_LDT), // /* */ ALWAYSDEFD(guest_GDT), - /* 10 */ ALWAYSDEFD(guest_EMWARN), + /* 10 */ ALWAYSDEFD(guest_EMNOTE), /* 11 */ ALWAYSDEFD(guest_SSEROUND), /* 12 */ ALWAYSDEFD(guest_TISTART), /* 13 */ ALWAYSDEFD(guest_TILEN), diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c index 1dcb74f3c8..fc24a3563c 100644 --- a/VEX/priv/guest_amd64_toIR.c +++ b/VEX/priv/guest_amd64_toIR.c @@ -436,7 +436,7 @@ static void unimplemented ( HChar* str ) #define OFFB_YMM15 offsetof(VexGuestAMD64State,guest_YMM15) #define OFFB_YMM16 offsetof(VexGuestAMD64State,guest_YMM16) -#define OFFB_EMWARN offsetof(VexGuestAMD64State,guest_EMWARN) +#define OFFB_EMNOTE offsetof(VexGuestAMD64State,guest_EMNOTE) #define OFFB_TISTART offsetof(VexGuestAMD64State,guest_TISTART) #define OFFB_TILEN offsetof(VexGuestAMD64State,guest_TILEN) @@ -4680,7 +4680,7 @@ static IRTemp gen_LZCNT ( IRType ty, IRTemp src ) static void put_emwarn ( IRExpr* e /* :: Ity_I32 */ ) { vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I32); - stmt( IRStmt_Put( OFFB_EMWARN, e ) ); + stmt( IRStmt_Put( OFFB_EMNOTE, e ) ); } /* --- Produce an IRExpr* denoting a 64-bit QNaN. --- */ @@ -5200,7 +5200,7 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok, case 4: { /* FLDENV m28 */ /* Uses dirty helper: - VexEmWarn amd64g_do_FLDENV ( VexGuestX86State*, HWord ) */ + VexEmNote amd64g_do_FLDENV ( VexGuestX86State*, HWord ) */ IRTemp ew = newTemp(Ity_I32); IRTemp w64 = newTemp(Ity_I64); IRDirty* d = unsafeIRDirty_0_N ( @@ -6166,7 +6166,7 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok, IRDirty* d; if ( have66(pfx) ) { /* Uses dirty helper: - VexEmWarn amd64g_dirtyhelper_FRSTORS + VexEmNote amd64g_dirtyhelper_FRSTORS ( VexGuestAMD64State*, HWord ) */ d = unsafeIRDirty_0_N ( 0/*regparms*/, @@ -6177,7 +6177,7 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok, d->mSize = 94; } else { /* Uses dirty helper: - VexEmWarn amd64g_dirtyhelper_FRSTOR + VexEmNote amd64g_dirtyhelper_FRSTOR ( VexGuestAMD64State*, HWord ) */ d = unsafeIRDirty_0_N ( 0/*regparms*/, @@ -13038,9 +13038,9 @@ Long dis_ESC_0F__SSE2 ( Bool* decode_OK, DIP("%sfxrstor %s\n", sz==8 ? "rex64/" : "", dis_buf); /* Uses dirty helper: - VexEmWarn amd64g_do_FXRSTOR ( VexGuestAMD64State*, ULong ) + VexEmNote amd64g_do_FXRSTOR ( VexGuestAMD64State*, ULong ) NOTE: - the VexEmWarn value is simply ignored + the VexEmNote value is simply ignored */ d = unsafeIRDirty_0_N ( 0/*regparms*/, diff --git a/VEX/priv/guest_arm_helpers.c b/VEX/priv/guest_arm_helpers.c index 42b2e78887..5c5d35055d 100644 --- a/VEX/priv/guest_arm_helpers.c +++ b/VEX/priv/guest_arm_helpers.c @@ -980,7 +980,7 @@ void LibVEX_GuestARM_initialise ( /*OUT*/VexGuestARMState* vex_state ) vex_state->guest_GEFLAG2 = 0; vex_state->guest_GEFLAG3 = 0; - vex_state->guest_EMWARN = 0; + vex_state->guest_EMNOTE = EmNote_NONE; vex_state->guest_TISTART = 0; vex_state->guest_TILEN = 0; vex_state->guest_NRADDR = 0; @@ -1129,7 +1129,7 @@ VexGuestLayout = { /* 0 */ ALWAYSDEFD(guest_R15T), /* 1 */ ALWAYSDEFD(guest_CC_OP), /* 2 */ ALWAYSDEFD(guest_CC_NDEP), - /* 3 */ ALWAYSDEFD(guest_EMWARN), + /* 3 */ ALWAYSDEFD(guest_EMNOTE), /* 4 */ ALWAYSDEFD(guest_TISTART), /* 5 */ ALWAYSDEFD(guest_TILEN), /* 6 */ ALWAYSDEFD(guest_NRADDR), diff --git a/VEX/priv/guest_mips_helpers.c b/VEX/priv/guest_mips_helpers.c index 4b5822c492..0606ed5ae9 100644 --- a/VEX/priv/guest_mips_helpers.c +++ b/VEX/priv/guest_mips_helpers.c @@ -134,8 +134,8 @@ void LibVEX_GuestMIPS32_initialise( /*OUT*/ VexGuestMIPS32State * vex_state) vex_state->guest_ULR = 0; /* TLS */ /* Various pseudo-regs mandated by Vex or Valgrind. */ - /* Emulation warnings */ - vex_state->guest_EMWARN = 0; + /* Emulation notes */ + vex_state->guest_EMNOTE = 0; /* For clflush: record start and length of area to invalidate */ vex_state->guest_TISTART = 0; @@ -221,7 +221,7 @@ VexGuestLayout mips32Guest_layout = { .alwaysDefd = { /* 0 */ ALWAYSDEFD32(guest_r0), /* 1 */ ALWAYSDEFD32(guest_r1), - /* 2 */ ALWAYSDEFD32(guest_EMWARN), + /* 2 */ ALWAYSDEFD32(guest_EMNOTE), /* 3 */ ALWAYSDEFD32(guest_TISTART), /* 4 */ ALWAYSDEFD32(guest_TILEN), /* 5 */ ALWAYSDEFD32(guest_r29), diff --git a/VEX/priv/guest_ppc_helpers.c b/VEX/priv/guest_ppc_helpers.c index 9f4639cc17..bb1bd79ef2 100644 --- a/VEX/priv/guest_ppc_helpers.c +++ b/VEX/priv/guest_ppc_helpers.c @@ -496,7 +496,7 @@ void LibVEX_GuestPPC32_initialise ( /*OUT*/VexGuestPPC32State* vex_state ) vex_state->guest_VSCR = 0x0; // Non-Java mode = 0 - vex_state->guest_EMWARN = EmWarn_NONE; + vex_state->guest_EMNOTE = EmNote_NONE; vex_state->guest_TISTART = 0; vex_state->guest_TILEN = 0; @@ -660,7 +660,7 @@ void LibVEX_GuestPPC64_initialise ( /*OUT*/VexGuestPPC64State* vex_state ) vex_state->guest_VSCR = 0x0; // Non-Java mode = 0 - vex_state->guest_EMWARN = EmWarn_NONE; + vex_state->guest_EMNOTE = EmNote_NONE; vex_state->padding = 0; @@ -807,7 +807,7 @@ VexGuestLayout .alwaysDefd = { /* 0 */ ALWAYSDEFD32(guest_CIA), - /* 1 */ ALWAYSDEFD32(guest_EMWARN), + /* 1 */ ALWAYSDEFD32(guest_EMNOTE), /* 2 */ ALWAYSDEFD32(guest_TISTART), /* 3 */ ALWAYSDEFD32(guest_TILEN), /* 4 */ ALWAYSDEFD32(guest_VSCR), @@ -848,7 +848,7 @@ VexGuestLayout .alwaysDefd = { /* 0 */ ALWAYSDEFD64(guest_CIA), - /* 1 */ ALWAYSDEFD64(guest_EMWARN), + /* 1 */ ALWAYSDEFD64(guest_EMNOTE), /* 2 */ ALWAYSDEFD64(guest_TISTART), /* 3 */ ALWAYSDEFD64(guest_TILEN), /* 4 */ ALWAYSDEFD64(guest_VSCR), diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c index 0ca00d82fe..cffdad1f46 100644 --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -225,7 +225,7 @@ static void* fnptr_to_fnentry( VexAbiInfo* vbi, void* f ) #define OFFB_DFPROUND offsetofPPCGuestState(guest_DFPROUND) #define OFFB_VRSAVE offsetofPPCGuestState(guest_VRSAVE) #define OFFB_VSCR offsetofPPCGuestState(guest_VSCR) -#define OFFB_EMWARN offsetofPPCGuestState(guest_EMWARN) +#define OFFB_EMNOTE offsetofPPCGuestState(guest_EMNOTE) #define OFFB_TISTART offsetofPPCGuestState(guest_TISTART) #define OFFB_TILEN offsetofPPCGuestState(guest_TILEN) #define OFFB_NRADDR offsetofPPCGuestState(guest_NRADDR) @@ -2653,7 +2653,7 @@ static void putGST ( PPC_GST reg, IRExpr* src ) case PPC_GST_EMWARN: vassert( ty_src == Ity_I32 ); - stmt( IRStmt_Put( OFFB_EMWARN,src) ); + stmt( IRStmt_Put( OFFB_EMNOTE,src) ); break; case PPC_GST_TISTART: @@ -2699,12 +2699,12 @@ static void putGST_masked ( PPC_GST reg, IRExpr* src, ULong mask ) >> 32 ) ) ) ) ); } - /* Give EmWarn for attempted writes to: + /* Give EmNote for attempted writes to: - Exception Controls - Non-IEEE Mode */ if (mask & 0xFC) { // Exception Control, Non-IEE mode - VexEmWarn ew = EmWarn_PPCexns; + VexEmNote ew = EmWarn_PPCexns; /* If any of the src::exception_control bits are actually set, side-exit to the next insn, reporting the warning, @@ -2712,7 +2712,7 @@ static void putGST_masked ( PPC_GST reg, IRExpr* src, ULong mask ) putGST( PPC_GST_EMWARN, mkU32(ew) ); stmt( IRStmt_Exit( - binop(Iop_CmpNE32, mkU32(ew), mkU32(EmWarn_NONE)), + binop(Iop_CmpNE32, mkU32(ew), mkU32(EmNote_NONE)), Ijk_EmWarn, mkSzConst( ty, nextInsnAddr()), OFFB_CIA )); } diff --git a/VEX/priv/guest_s390_helpers.c b/VEX/priv/guest_s390_helpers.c index 19d137fb44..09ee1581b7 100644 --- a/VEX/priv/guest_s390_helpers.c +++ b/VEX/priv/guest_s390_helpers.c @@ -130,7 +130,7 @@ LibVEX_GuestS390X_initialise(VexGuestS390XState *state) state->guest_TISTART = 0; state->guest_TILEN = 0; state->guest_IP_AT_SYSCALL = 0; - state->guest_EMWARN = EmWarn_NONE; + state->guest_EMNOTE = EmNote_NONE; state->host_EvC_COUNTER = 0; state->host_EvC_FAILADDR = 0; @@ -223,7 +223,7 @@ VexGuestLayout s390xGuest_layout = { .alwaysDefd = { /* 0 */ ALWAYSDEFD(guest_CC_OP), /* generic */ /* 1 */ ALWAYSDEFD(guest_CC_NDEP), /* generic */ - /* 2 */ ALWAYSDEFD(guest_EMWARN), /* generic */ + /* 2 */ ALWAYSDEFD(guest_EMNOTE), /* generic */ /* 3 */ ALWAYSDEFD(guest_TISTART), /* generic */ /* 4 */ ALWAYSDEFD(guest_TILEN), /* generic */ /* 5 */ ALWAYSDEFD(guest_IP_AT_SYSCALL), /* generic */ diff --git a/VEX/priv/guest_x86_defs.h b/VEX/priv/guest_x86_defs.h index 994bce9fc5..54c2a0f11a 100644 --- a/VEX/priv/guest_x86_defs.h +++ b/VEX/priv/guest_x86_defs.h @@ -159,13 +159,13 @@ extern void x86g_dirtyhelper_OUT ( UInt portno, UInt data, extern void x86g_dirtyhelper_SxDT ( void* address, UInt op /* 0 or 1 */ ); -extern VexEmWarn +extern VexEmNote x86g_dirtyhelper_FXRSTOR ( VexGuestX86State*, HWord ); -extern VexEmWarn +extern VexEmNote x86g_dirtyhelper_FRSTOR ( VexGuestX86State*, HWord ); -extern VexEmWarn +extern VexEmNote x86g_dirtyhelper_FLDENV ( VexGuestX86State*, HWord ); diff --git a/VEX/priv/guest_x86_helpers.c b/VEX/priv/guest_x86_helpers.c index d06181478d..1a6f89417b 100644 --- a/VEX/priv/guest_x86_helpers.c +++ b/VEX/priv/guest_x86_helpers.c @@ -1473,7 +1473,7 @@ ULong x86g_check_fldcw ( UInt fpucw ) UInt rmode = (fpucw >> 10) & 3; /* Detect any required emulation warnings. */ - VexEmWarn ew = EmWarn_NONE; + VexEmNote ew = EmNote_NONE; if ((fpucw & 0x3F) != 0x3F) { /* unmasked exceptions! */ @@ -1510,7 +1510,7 @@ ULong x86g_check_ldmxcsr ( UInt mxcsr ) UInt rmode = (mxcsr >> 13) & 3; /* Detect any required emulation warnings. */ - VexEmWarn ew = EmWarn_NONE; + VexEmNote ew = EmNote_NONE; if ((mxcsr & 0x1F80) != 0x1F80) { /* unmasked exceptions! */ @@ -1561,7 +1561,7 @@ void x86g_dirtyhelper_FINIT ( VexGuestX86State* gst ) appears to differ from the former only in that the 8 FP registers themselves are not transferred into the guest state. */ static -VexEmWarn do_put_x87 ( Bool moveRegs, +VexEmNote do_put_x87 ( Bool moveRegs, /*IN*/UChar* x87_state, /*OUT*/VexGuestX86State* vex_state ) { @@ -1574,7 +1574,7 @@ VexEmWarn do_put_x87 ( Bool moveRegs, UInt tagw = x87->env[FP_ENV_TAG]; UInt fpucw = x87->env[FP_ENV_CTRL]; UInt c3210 = x87->env[FP_ENV_STAT] & 0x4700; - VexEmWarn ew; + VexEmNote ew; UInt fpround; ULong pair; @@ -1610,7 +1610,7 @@ VexEmWarn do_put_x87 ( Bool moveRegs, emulation warnings. */ pair = x86g_check_fldcw ( (UInt)fpucw ); fpround = (UInt)pair; - ew = (VexEmWarn)(pair >> 32); + ew = (VexEmNote)(pair >> 32); vex_state->guest_FPROUND = fpround & 3; @@ -1755,11 +1755,11 @@ void x86g_dirtyhelper_FXSAVE ( VexGuestX86State* gst, HWord addr ) /* CALLED FROM GENERATED CODE */ /* DIRTY HELPER (writes guest state, reads guest mem) */ -VexEmWarn x86g_dirtyhelper_FXRSTOR ( VexGuestX86State* gst, HWord addr ) +VexEmNote x86g_dirtyhelper_FXRSTOR ( VexGuestX86State* gst, HWord addr ) { Fpu_State tmp; - VexEmWarn warnX87 = EmWarn_NONE; - VexEmWarn warnXMM = EmWarn_NONE; + VexEmNote warnX87 = EmNote_NONE; + VexEmNote warnXMM = EmNote_NONE; UShort* addrS = (UShort*)addr; UChar* addrC = (UChar*)addr; U128* xmm = (U128*)(addr + 160); @@ -1833,13 +1833,13 @@ VexEmWarn x86g_dirtyhelper_FXRSTOR ( VexGuestX86State* gst, HWord addr ) | ((((UInt)addrS[13]) & 0xFFFF) << 16); ULong w64 = x86g_check_ldmxcsr( w32 ); - warnXMM = (VexEmWarn)(w64 >> 32); + warnXMM = (VexEmNote)(w64 >> 32); gst->guest_SSEROUND = (UInt)w64; } /* Prefer an X87 emwarn over an XMM one, if both exist. */ - if (warnX87 != EmWarn_NONE) + if (warnX87 != EmNote_NONE) return warnX87; else return warnXMM; @@ -1855,7 +1855,7 @@ void x86g_dirtyhelper_FSAVE ( VexGuestX86State* gst, HWord addr ) /* CALLED FROM GENERATED CODE */ /* DIRTY HELPER (writes guest state, reads guest mem) */ -VexEmWarn x86g_dirtyhelper_FRSTOR ( VexGuestX86State* gst, HWord addr ) +VexEmNote x86g_dirtyhelper_FRSTOR ( VexGuestX86State* gst, HWord addr ) { return do_put_x87( True/*regs too*/, (UChar*)addr, gst ); } @@ -1875,7 +1875,7 @@ void x86g_dirtyhelper_FSTENV ( VexGuestX86State* gst, HWord addr ) /* CALLED FROM GENERATED CODE */ /* DIRTY HELPER (writes guest state, reads guest mem) */ -VexEmWarn x86g_dirtyhelper_FLDENV ( VexGuestX86State* gst, HWord addr ) +VexEmNote x86g_dirtyhelper_FLDENV ( VexGuestX86State* gst, HWord addr ) { return do_put_x87( False/*don't move regs*/, (UChar*)addr, gst); } @@ -2720,7 +2720,7 @@ void LibVEX_GuestX86_initialise ( /*OUT*/VexGuestX86State* vex_state ) vex_state->guest_LDT = 0; vex_state->guest_GDT = 0; - vex_state->guest_EMWARN = EmWarn_NONE; + vex_state->guest_EMNOTE = EmNote_NONE; /* SSE2 has a 'clflush' cache-line-invalidator which uses these. */ vex_state->guest_TISTART = 0; @@ -2830,7 +2830,7 @@ VexGuestLayout /* 15 */ ALWAYSDEFD(guest_SS), /* 16 */ ALWAYSDEFD(guest_LDT), /* 17 */ ALWAYSDEFD(guest_GDT), - /* 18 */ ALWAYSDEFD(guest_EMWARN), + /* 18 */ ALWAYSDEFD(guest_EMNOTE), /* 19 */ ALWAYSDEFD(guest_SSEROUND), /* 20 */ ALWAYSDEFD(guest_TISTART), /* 21 */ ALWAYSDEFD(guest_TILEN), diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c index e8780dbb62..5dc58b5e9f 100644 --- a/VEX/priv/guest_x86_toIR.c +++ b/VEX/priv/guest_x86_toIR.c @@ -276,7 +276,7 @@ static IRSB* irsb; #define OFFB_XMM6 offsetof(VexGuestX86State,guest_XMM6) #define OFFB_XMM7 offsetof(VexGuestX86State,guest_XMM7) -#define OFFB_EMWARN offsetof(VexGuestX86State,guest_EMWARN) +#define OFFB_EMNOTE offsetof(VexGuestX86State,guest_EMNOTE) #define OFFB_TISTART offsetof(VexGuestX86State,guest_TISTART) #define OFFB_TILEN offsetof(VexGuestX86State,guest_TILEN) @@ -3445,7 +3445,7 @@ static IRTemp gen_LZCNT ( IRType ty, IRTemp src ) static void put_emwarn ( IRExpr* e /* :: Ity_I32 */ ) { vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I32); - stmt( IRStmt_Put( OFFB_EMWARN, e ) ); + stmt( IRStmt_Put( OFFB_EMNOTE, e ) ); } /* --- Produce an IRExpr* denoting a 64-bit QNaN. --- */ @@ -3937,7 +3937,7 @@ UInt dis_FPU ( Bool* decode_ok, UChar sorb, Int delta ) case 4: { /* FLDENV m28 */ /* Uses dirty helper: - VexEmWarn x86g_do_FLDENV ( VexGuestX86State*, HWord ) */ + VexEmNote x86g_do_FLDENV ( VexGuestX86State*, HWord ) */ IRTemp ew = newTemp(Ity_I32); IRDirty* d = unsafeIRDirty_0_N ( 0/*regparms*/, @@ -4928,7 +4928,7 @@ UInt dis_FPU ( Bool* decode_ok, UChar sorb, Int delta ) case 4: { /* FRSTOR m108 */ /* Uses dirty helper: - VexEmWarn x86g_do_FRSTOR ( VexGuestX86State*, Addr32 ) */ + VexEmNote x86g_do_FRSTOR ( VexGuestX86State*, Addr32 ) */ IRTemp ew = newTemp(Ity_I32); IRDirty* d = unsafeIRDirty_0_N ( 0/*regparms*/, @@ -8235,9 +8235,9 @@ DisResult disInstr_X86_WRK ( DIP("fxrstor %s\n", dis_buf); /* Uses dirty helper: - VexEmWarn x86g_do_FXRSTOR ( VexGuestX86State*, UInt ) + VexEmNote x86g_do_FXRSTOR ( VexGuestX86State*, UInt ) NOTE: - the VexEmWarn value is simply ignored (unlike for FRSTOR) + the VexEmNote value is simply ignored (unlike for FRSTOR) */ d = unsafeIRDirty_0_N ( 0/*regparms*/, diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c index c0995a2ce2..ce7351c65b 100644 --- a/VEX/priv/main_main.c +++ b/VEX/priv/main_main.c @@ -1003,10 +1003,10 @@ VexInvalRange LibVEX_PatchProfInc ( VexArch arch_host, /* --------- Emulation warnings. --------- */ -HChar* LibVEX_EmWarn_string ( VexEmWarn ew ) +HChar* LibVEX_EmNote_string ( VexEmNote ew ) { switch (ew) { - case EmWarn_NONE: + case EmNote_NONE: return "none"; case EmWarn_X86_x87exns: return "Unmasking x87 FP exceptions"; @@ -1027,7 +1027,7 @@ HChar* LibVEX_EmWarn_string ( VexEmWarn ew ) case EmWarn_PPC64_redir_underflow: return "PPC64 function redirection stack underflow"; default: - vpanic("LibVEX_EmWarn_string: unknown warning"); + vpanic("LibVEX_EmNote_string: unknown warning"); } } diff --git a/VEX/pub/libvex_emnote.h b/VEX/pub/libvex_emnote.h index 4f43f43229..f7b68eb040 100644 --- a/VEX/pub/libvex_emnote.h +++ b/VEX/pub/libvex_emnote.h @@ -1,6 +1,6 @@ /*---------------------------------------------------------------*/ -/*--- begin libvex_emwarn.h ---*/ +/*--- begin libvex_emnote.h ---*/ /*---------------------------------------------------------------*/ /* @@ -33,30 +33,32 @@ without prior written permission. */ -#ifndef __LIBVEX_EMWARN_H -#define __LIBVEX_EMWARN_H +#ifndef __LIBVEX_EMNOTE_H +#define __LIBVEX_EMNOTE_H /* VEX can sometimes generate code which returns to the dispatcher - with the guest state pointer set to VEX_TRC_JMP_EMWARN. This means - that VEX is trying to warn Valgrind that it is doing imprecise - emulation in some sense. The guest's pseudo-register - "guest_EMWARN" will hold a value of type VexEmWarn, which describes + with the guest state pointer set to VEX_TRC_JMP_EMWARN or + VEX_TRC_JMP_EMFAIL. This means that VEX is trying to tell Valgrind + something noteworthy about emulation progress. For example, that Valgrind + is doing imprecise emulation in some sense. The guest's pseudo-register + "guest_EMNOTE" will hold a value of type VexEmNote, which describes the nature of the warning. Currently the limitations that are warned about apply primarily to floating point support. - All guest states should have a 32-bit (UInt) guest_EMWARN pseudo- + All guest states must have a 32-bit (UInt) guest_EMNOTE pseudo- register, that emulation warnings can be written in to. - Note that guest_EMWARN only carries a valid value at the jump - marked as VEX_TRC_JMP_EMWARN. You can't assume it will continue to - carry a valid value from any amount of time after the jump. + Note that guest_EMNOTE only carries a valid value at the jump + marked as VEX_TRC_JMP_EMWARN / VEX_TRC_JMP_EMFAIL. You can't assume + it will continue to carry a valid value from any amount of time after + the jump. */ typedef enum { - /* no warning indicated */ - EmWarn_NONE=0, + /* no note indicated */ + EmNote_NONE=0, /* unmasking x87 FP exceptions is not supported */ EmWarn_X86_x87exns, @@ -83,17 +85,17 @@ typedef EmWarn_PPC64_redir_overflow, EmWarn_PPC64_redir_underflow, - EmWarn_NUMBER + EmNote_NUMBER } - VexEmWarn; + VexEmNote; /* Produces a short string describing the warning. */ -extern HChar* LibVEX_EmWarn_string ( VexEmWarn ); +extern HChar* LibVEX_EmNote_string ( VexEmNote ); -#endif /* ndef __LIBVEX_EMWARN_H */ +#endif /* ndef __LIBVEX_EMNOTE_H */ /*---------------------------------------------------------------*/ -/*--- libvex_emwarn.h ---*/ +/*--- libvex_emnote.h ---*/ /*---------------------------------------------------------------*/ diff --git a/VEX/pub/libvex_guest_amd64.h b/VEX/pub/libvex_guest_amd64.h index 00ee05d3f4..9c12e885d2 100644 --- a/VEX/pub/libvex_guest_amd64.h +++ b/VEX/pub/libvex_guest_amd64.h @@ -129,8 +129,8 @@ typedef ULong guest_FPROUND; ULong guest_FC3210; - /* Emulation warnings */ - UInt guest_EMWARN; + /* Emulation notes */ + UInt guest_EMNOTE; /* Translation-invalidation area description. Not used on amd64 (there is no invalidate-icache insn), but needed so as to diff --git a/VEX/pub/libvex_guest_arm.h b/VEX/pub/libvex_guest_arm.h index 29d60c7d26..a0d492445c 100644 --- a/VEX/pub/libvex_guest_arm.h +++ b/VEX/pub/libvex_guest_arm.h @@ -92,8 +92,8 @@ typedef UInt guest_GEFLAG3; /* Various pseudo-regs mandated by Vex or Valgrind. */ - /* Emulation warnings */ - UInt guest_EMWARN; + /* Emulation notes */ + UInt guest_EMNOTE; /* For clflush: record start and length of area to invalidate */ UInt guest_TISTART; diff --git a/VEX/pub/libvex_guest_mips32.h b/VEX/pub/libvex_guest_mips32.h index 204ad8cc25..eac4657083 100644 --- a/VEX/pub/libvex_guest_mips32.h +++ b/VEX/pub/libvex_guest_mips32.h @@ -129,8 +129,8 @@ typedef */ /* 288 */ UInt guest_ULR; - /* Emulation warnings */ - UInt guest_EMWARN; /* 292 */ + /* Emulation notes */ + UInt guest_EMNOTE; /* 292 */ /* For clflush: record start and length of area to invalidate */ UInt guest_TISTART; /* 296 */ diff --git a/VEX/pub/libvex_guest_ppc32.h b/VEX/pub/libvex_guest_ppc32.h index 4821d828ff..3f615fec48 100644 --- a/VEX/pub/libvex_guest_ppc32.h +++ b/VEX/pub/libvex_guest_ppc32.h @@ -207,8 +207,8 @@ typedef /* Vector Status and Control Register */ /* 1192 */ UInt guest_VSCR; - /* Emulation warnings */ - /* 1196 */ UInt guest_EMWARN; + /* Emulation notes */ + /* 1196 */ UInt guest_EMNOTE; /* For icbi: record start and length of area to invalidate */ /* 1200 */ UInt guest_TISTART; diff --git a/VEX/pub/libvex_guest_ppc64.h b/VEX/pub/libvex_guest_ppc64.h index 585a55430a..31c4b62a4e 100644 --- a/VEX/pub/libvex_guest_ppc64.h +++ b/VEX/pub/libvex_guest_ppc64.h @@ -246,8 +246,8 @@ typedef /* Vector Status and Control Register */ /* 1332 */ UInt guest_VSCR; - /* Emulation warnings */ - /* 1336 */ UInt guest_EMWARN; + /* Emulation notes */ + /* 1336 */ UInt guest_EMNOTE; /* gcc adds 4 bytes padding here: pre-empt it. */ /* 1340 */ UInt padding; diff --git a/VEX/pub/libvex_guest_s390x.h b/VEX/pub/libvex_guest_s390x.h index 3d1b0870a6..5d121e1ef3 100644 --- a/VEX/pub/libvex_guest_s390x.h +++ b/VEX/pub/libvex_guest_s390x.h @@ -141,8 +141,8 @@ typedef struct { libvex_ir.h */ /* 408 */ ULong guest_IP_AT_SYSCALL; - /* Emulation warnings; see comments in libvex_emwarn.h */ - /* 416 */ UInt guest_EMWARN; + /* Emulation notes; see comments in libvex_emnote.h */ + /* 416 */ UInt guest_EMNOTE; /* For translation chaining */ /* 420 */ UInt host_EvC_COUNTER; diff --git a/VEX/pub/libvex_guest_x86.h b/VEX/pub/libvex_guest_x86.h index 166c63e6bc..3dcbc57e86 100644 --- a/VEX/pub/libvex_guest_x86.h +++ b/VEX/pub/libvex_guest_x86.h @@ -197,8 +197,8 @@ typedef HWord guest_LDT; /* host addr, a VexGuestX86SegDescr* */ HWord guest_GDT; /* host addr, a VexGuestX86SegDescr* */ - /* Emulation warnings */ - UInt guest_EMWARN; + /* Emulation notes */ + UInt guest_EMNOTE; /* For clflush: record start and length of area to invalidate */ UInt guest_TISTART; diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h index 6e30817d6a..24d428d9e4 100644 --- a/VEX/pub/libvex_ir.h +++ b/VEX/pub/libvex_ir.h @@ -1833,9 +1833,9 @@ extern Bool eqIRAtom ( IRExpr*, IRExpr* ); a jump of kind Ijk_TInval. Re Ijk_EmWarn and Ijk_EmFail: the guest state must have a - pseudo-register guest_EMWARN, which is 32-bits regardless of the - host or guest word size. That register should be made to hold an - EmWarn_* value to indicate the reason for the exit. + pseudo-register guest_EMNOTE, which is 32-bits regardless of the + host or guest word size. That register should be made to hold a + VexEmNote value to indicate the reason for the exit. In the case of Ijk_EmFail, the exit is fatal (Vex-generated code cannot continue) and so the jump destination can be anything.