From: bui duc phuc Date: Tue, 9 Jun 2026 11:38:34 +0000 (+0700) Subject: ASoC: renesas: fsi: Add SPU clock support X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=39033b278f9c59d5913af89e5de3c3a0d2a9a89e;p=thirdparty%2Flinux.git ASoC: renesas: fsi: Add SPU clock support FSI register accesses on the r8a7740 require the SPU bus clock to be enabled. Add support for acquiring and managing the SPU clock via the device tree to ensure proper register access. Acked-by: Kuninori Morimoto Suggested-by: Kuninori Morimoto Signed-off-by: bui duc phuc Link: https://patch.msgid.link/20260609113836.45079-10-phucduc.bui@gmail.com Signed-off-by: Mark Brown --- diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 43bc77ebcca39..716ecf0401fe3 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -292,6 +292,7 @@ struct fsi_master { void __iomem *base; struct fsi_priv fsia; struct fsi_priv fsib; + struct clk *clk_spu; const struct fsi_core *core; spinlock_t lock; }; @@ -983,6 +984,7 @@ static int fsi_clk_set_rate_cpg(struct device *dev, static int fsi_clk_init(struct device *dev, struct fsi_priv *fsi) { struct fsi_clk *clock = &fsi->clock; + struct fsi_master *master = fsi->master; int is_porta = fsi_is_port_a(fsi); int xck, ick, div; @@ -1004,6 +1006,13 @@ static int fsi_clk_init(struct device *dev, struct fsi_priv *fsi) if (IS_ERR(clock->own)) return dev_err_probe(dev, PTR_ERR(clock->own), "Can't get fck clock\n"); + if (!master->clk_spu) { + master->clk_spu = devm_clk_get_optional(dev, "spu"); + if (IS_ERR(master->clk_spu)) + return dev_err_probe(dev, PTR_ERR(master->clk_spu), + "Can't get spu clock\n"); + } + /* external clock */ if (xck) { clock->xck = devm_clk_get_optional(dev, is_porta ? "xcka" : "xckb");