From: Zoltan HERPAI Date: Thu, 29 May 2025 20:58:28 +0000 (+0200) Subject: sunxi: drop 6.6 support X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=393047e47a6dbbe523c8e80a0aca7fb15dd75c57;p=thirdparty%2Fopenwrt.git sunxi: drop 6.6 support Drop configs and patches for Linux 6.6. Signed-off-by: Zoltan HERPAI --- diff --git a/target/linux/sunxi/config-6.6 b/target/linux/sunxi/config-6.6 deleted file mode 100644 index 6a31400b489..00000000000 --- a/target/linux/sunxi/config-6.6 +++ /dev/null @@ -1,524 +0,0 @@ -# CONFIG_AHCI_SUNXI is not set -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_FORCE_MAX_ORDER=11 -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=416 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUNXI=y -CONFIG_ARCH_SUNXI_MC_SMP=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ATAG_DTB_COMPAT=y -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y -CONFIG_ARM_CCI=y -CONFIG_ARM_CCI400_COMMON=y -CONFIG_ARM_CCI400_PORT_CTRL=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_643719=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_LPAE=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_PSCI=y -CONFIG_ARM_PSCI_FW=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_AXP20X_POWER=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_PM=y -CONFIG_BOUNCE=y -CONFIG_CACHE_L2X0=y -CONFIG_CAN=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CONFIGFS_FS=y -CONFIG_CONNECTOR=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_COREDUMP=y -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRCT10DIF_ARM_CE=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -CONFIG_CRYPTO_DEV_SUN4I_SS=y -# CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG is not set -CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y -# CONFIG_CRYPTO_DEV_SUN8I_CE is not set -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_SUN4I=y -CONFIG_DMA_SUN6I=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_DVB_CORE=y -CONFIG_DWMAC_GENERIC=y -# CONFIG_DWMAC_SUN8I is not set -CONFIG_DWMAC_SUNXI=y -CONFIG_DYNAMIC_DEBUG=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ELF_CORE=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FAT_FS=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_FOREIGN_ENDIAN=y -CONFIG_FB_LITTLE_ENDIAN=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FB_TILEBLITTING=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAME_WARN=2048 -CONFIG_FREEZER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_CACHE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_VDSO_32=y -CONFIG_GLOB=y -CONFIG_GPIO_CDEV=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_SMP=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HWMON=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_TIMERIOMEM=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_MV64XXX=y -CONFIG_I2C_SUN6I_P2WI=y -CONFIG_IIO=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_AXP20X_PEK=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KALLSYMS=y -CONFIG_KEYBOARD_SUN4I_LRADC=y -CONFIG_KMAP_LOCAL=y -CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y -CONFIG_KSM=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_PLATFORM=y -CONFIG_LEDS_GPIO=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_MACH_SUN4I=y -CONFIG_MACH_SUN5I=y -CONFIG_MACH_SUN6I=y -CONFIG_MACH_SUN7I=y -CONFIG_MACH_SUN8I=y -CONFIG_MACH_SUN9I=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MDIO_SUN4I=y -CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -CONFIG_MEDIA_PLATFORM_SUPPORT=y -CONFIG_MEDIA_RADIO_SUPPORT=y -CONFIG_MEDIA_SDR_SUPPORT=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_TEST_SUPPORT=y -CONFIG_MEDIA_TUNER=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_AXP20X=y -CONFIG_MFD_AXP20X_I2C=y -CONFIG_MFD_AXP20X_RSB=y -CONFIG_MFD_CORE=y -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_SUNXI=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIT_FW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_VENDOR_ALLWINNER=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=8 -CONFIG_NVMEM=y -CONFIG_NVMEM_SUNXI_SID=y -CONFIG_NVMEM_SYSFS=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PAGE_POOL=y -CONFIG_PCS_XPCS=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_SUN4I_USB=y -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_PHY_SUN6I_MIPI_DPHY is not set -CONFIG_PHY_SUN9I_USB=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_AXP209=y -# CONFIG_PINCTRL_SUN20I_D1 is not set -CONFIG_PINCTRL_SUN4I_A10=y -# CONFIG_PINCTRL_SUN50I_A100 is not set -# CONFIG_PINCTRL_SUN50I_A100_R is not set -# CONFIG_PINCTRL_SUN50I_A64 is not set -# CONFIG_PINCTRL_SUN50I_A64_R is not set -# CONFIG_PINCTRL_SUN50I_H5 is not set -# CONFIG_PINCTRL_SUN50I_H6 is not set -# CONFIG_PINCTRL_SUN50I_H616 is not set -# CONFIG_PINCTRL_SUN50I_H616_R is not set -# CONFIG_PINCTRL_SUN50I_H6_R is not set -CONFIG_PINCTRL_SUN5I=y -CONFIG_PINCTRL_SUN6I_A31=y -CONFIG_PINCTRL_SUN6I_A31_R=y -CONFIG_PINCTRL_SUN8I_A23=y -CONFIG_PINCTRL_SUN8I_A23_R=y -CONFIG_PINCTRL_SUN8I_A33=y -CONFIG_PINCTRL_SUN8I_A83T=y -CONFIG_PINCTRL_SUN8I_A83T_R=y -CONFIG_PINCTRL_SUN8I_H3=y -CONFIG_PINCTRL_SUN8I_H3_R=y -CONFIG_PINCTRL_SUN8I_V3S=y -CONFIG_PINCTRL_SUN9I_A80=y -CONFIG_PINCTRL_SUN9I_A80_R=y -CONFIG_PINCTRL_SUNXI=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PRINTK_TIME=y -CONFIG_PROC_EVENTS=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_SUN4I=y -CONFIG_PWM_SYSFS=y -CONFIG_RATIONAL=y -CONFIG_REALTEK_PHY=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_IRQ=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_AXP20X=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_SY8106A=y -CONFIG_RELAY=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SATA_HOST=y -CONFIG_SATA_PMP=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -CONFIG_SDIO_UART=y -CONFIG_SECURITYFS=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=8 -CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SND=y -CONFIG_SND_COMPRESS_OFFLOAD=y -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -CONFIG_SND_PCM=y -CONFIG_SND_SIMPLE_CARD=y -CONFIG_SND_SIMPLE_CARD_UTILS=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SUN4I_I2S is not set -# CONFIG_SND_SUN4I_SPDIF is not set -# CONFIG_SND_SUN50I_DMIC is not set -# CONFIG_SND_SUN8I_CODEC is not set -# CONFIG_SND_SUN8I_CODEC_ANALOG is not set -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_SUN4I=y -CONFIG_SPI_SUN6I=y -CONFIG_SRCU=y -CONFIG_STMMAC_ETH=y -CONFIG_STMMAC_PLATFORM=y -# CONFIG_SUN20I_GPADC is not set -# CONFIG_SUN20I_PPU is not set -CONFIG_SUN4I_A10_CCU=y -# CONFIG_SUN4I_EMAC is not set -CONFIG_SUN4I_TIMER=y -CONFIG_SUN5I_CCU=y -CONFIG_SUN5I_HSTIMER=y -CONFIG_SUN6I_A31_CCU=y -# CONFIG_SUN6I_RTC_CCU is not set -CONFIG_SUN8I_A23_CCU=y -CONFIG_SUN8I_A33_CCU=y -CONFIG_SUN8I_A83T_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_R40_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_SUN8I_THERMAL=y -CONFIG_SUN8I_V3S_CCU=y -CONFIG_SUN9I_A80_CCU=y -CONFIG_SUNXI_CCU=y -CONFIG_SUNXI_MBUS=y -CONFIG_SUNXI_RSB=y -CONFIG_SUNXI_SRAM=y -CONFIG_SUNXI_WATCHDOG=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TOUCHSCREEN_SUN4I=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWC2=y -CONFIG_USB_DWC2_HOST=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_GADGET=y -CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USERIO=y -CONFIG_USE_OF=y -CONFIG_VFAT_FS=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VHOST=y -CONFIG_VHOST_IOTLB=y -CONFIG_VHOST_NET=y -# CONFIG_VIDEO_SUN4I_CSI is not set -# CONFIG_VIDEO_SUN6I_CSI is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 diff --git a/target/linux/sunxi/cortexa53/config-6.6 b/target/linux/sunxi/cortexa53/config-6.6 deleted file mode 100644 index 89cd43a54ef..00000000000 --- a/target/linux/sunxi/cortexa53/config-6.6 +++ /dev/null @@ -1,109 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -# CONFIG_ARCH_NXP is not set -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_CRYPTO=y -CONFIG_ARM64_ERRATUM_2051678=y -CONFIG_ARM64_ERRATUM_2054223=y -CONFIG_ARM64_ERRATUM_2067961=y -CONFIG_ARM64_ERRATUM_2077057=y -CONFIG_ARM64_ERRATUM_2658417=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_BLAKE2S=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SIMD=y -# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set -# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DWMAC_SUN8I=y -CONFIG_EEPROM_AT24=y -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_MDIO_BUS_MUX=y -CONFIG_MICREL_PHY=y -# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MOTORCOMM_PHY=y -CONFIG_MUSB_PIO_ONLY=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_IOPORT_MAP=y -# CONFIG_PAGE_TABLE_CHECK is not set -CONFIG_PARTITION_PERCPU=y -CONFIG_PHY_SUN50I_USB3=y -CONFIG_PINCTRL_SUN50I_A100=y -CONFIG_PINCTRL_SUN50I_A100_R=y -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H616=y -CONFIG_PINCTRL_SUN50I_H616_R=y -CONFIG_PINCTRL_SUN50I_H6_R=y -# CONFIG_PREEMPT_DYNAMIC is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RANDOMIZE_KSTACK_OFFSET=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_SCHED_CLUSTER is not set -# CONFIG_SHADOW_CALL_STACK is not set -# CONFIG_SND_SUN50I_CODEC_ANALOG is not set -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SUN50I_A100_CCU=y -CONFIG_SUN50I_A100_R_CCU=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -CONFIG_SUN50I_H616_CCU=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -# CONFIG_SUN6I_RTC_CCU is not set -CONFIG_SURFACE_PLATFORMS=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB_MUSB_DUAL_ROLE=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SUNXI=y -CONFIG_USB_PHY=y -CONFIG_VMAP_STACK=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/sunxi/cortexa7/config-6.6 b/target/linux/sunxi/cortexa7/config-6.6 deleted file mode 100644 index c1e2882f354..00000000000 --- a/target/linux/sunxi/cortexa7/config-6.6 +++ /dev/null @@ -1,27 +0,0 @@ -CONFIG_B53=y -CONFIG_B53_MDIO_DRIVER=y -CONFIG_CRYPTO_BLAKE2S_ARM=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_DWMAC_SUN8I=y -CONFIG_GRO_CELLS=y -# CONFIG_HARDEN_BRANCH_HISTORY is not set -# CONFIG_HARDEN_BRANCH_PREDICTOR is not set -# CONFIG_MACH_SUN4I is not set -# CONFIG_MACH_SUN5I is not set -CONFIG_MDIO_BUS_MUX=y -CONFIG_MICREL_PHY=y -CONFIG_MUSB_PIO_ONLY=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_RTC_DRV_SUN6I=y -CONFIG_SUN20I_D1_CCU=y -CONFIG_SUN20I_D1_R_CCU=y -CONFIG_USB_MUSB_DUAL_ROLE=y -CONFIG_USB_MUSB_HDRC=y -CONFIG_USB_MUSB_SUNXI=y -CONFIG_USB_PHY=y diff --git a/target/linux/sunxi/cortexa8/config-6.6 b/target/linux/sunxi/cortexa8/config-6.6 deleted file mode 100644 index b893b3142e0..00000000000 --- a/target/linux/sunxi/cortexa8/config-6.6 +++ /dev/null @@ -1,12 +0,0 @@ -# CONFIG_ARM_LPAE is not set -CONFIG_CRYPTO_BLAKE2S_ARM=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -# CONFIG_MACH_SUN6I is not set -# CONFIG_MACH_SUN7I is not set -# CONFIG_MACH_SUN8I is not set -# CONFIG_MACH_SUN9I is not set -CONFIG_PGTABLE_LEVELS=2 -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_SPI_SUN6I is not set -# CONFIG_SUN8I_A83T_CCU is not set -# CONFIG_SUN8I_THERMAL is not set diff --git a/target/linux/sunxi/patches-6.6/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch b/target/linux/sunxi/patches-6.6/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch deleted file mode 100644 index ce8add18ab4..00000000000 --- a/target/linux/sunxi/patches-6.6/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 951992797378a2177946400438f4d23c9fceae5b Mon Sep 17 00:00:00 2001 -From: Martin Botka -Date: Tue, 12 Sep 2023 14:25:13 +0200 -Subject: [PATCH] arm64: dts: allwinner: h616: Add SID controller node - -Add node for the H616 SID controller - -Signed-off-by: Martin Botka -Acked-by: Jernej Skrabec -Link: https://lore.kernel.org/r/20230912-sid-h616-v3-2-ee18e1c5bbb5@somainline.org -Signed-off-by: Jernej Skrabec ---- - arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -@@ -133,6 +133,13 @@ - #reset-cells = <1>; - }; - -+ sid: efuse@3006000 { -+ compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid"; -+ reg = <0x03006000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ }; -+ - watchdog: watchdog@30090a0 { - compatible = "allwinner,sun50i-h616-wdt", - "allwinner,sun6i-a31-wdt"; diff --git a/target/linux/sunxi/patches-6.6/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch b/target/linux/sunxi/patches-6.6/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch deleted file mode 100644 index 5f9cb0273ae..00000000000 --- a/target/linux/sunxi/patches-6.6/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch +++ /dev/null @@ -1,98 +0,0 @@ -From 898d96c5464b69af44f6407c5de81ebc349d574b Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Mon, 19 Feb 2024 15:36:33 +0000 -Subject: [PATCH] soc: sunxi: sram: export register 0 for THS on H616 - -The Allwinner H616 SoC contains a mysterious bit at register offset 0x0 -in the SRAM control block. If bit 16 is set (the reset value), the -temperature readings of the THS are way off, leading to reports about -200C, at normal ambient temperatures. Clearing this bits brings the -reported values down to the expected values. -The BSP code clears this bit in firmware (U-Boot), and has an explicit -comment about this, but offers no real explanation. - -Experiments in U-Boot show that register 0x0 has no effect on the SRAM C -visibility: all tested bit settings still allow full read and write -access by the CPU to the whole of SRAM C. Only bit 24 of the register at -offset 0x4 makes all of SRAM C inaccessible by the CPU. So modelling -the THS switch functionality as an SRAM region would not reflect reality. - -Since we should not rely on firmware settings, allow other code (the THS -driver) to access this register, by exporting it through the already -existing regmap. This mimics what we already do for the LDO control and -the EMAC register. - -To avoid concurrent accesses to the same register at the same time, by -the SRAM switch code and the regmap code, use the same lock to protect -the access. The regmap subsystem allows to use an existing lock, so we -just need to hook in there. - -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20240219153639.179814-2-andre.przywara@arm.com ---- - drivers/soc/sunxi/sunxi_sram.c | 22 ++++++++++++++++++++++ - 1 file changed, 22 insertions(+) - ---- a/drivers/soc/sunxi/sunxi_sram.c -+++ b/drivers/soc/sunxi/sunxi_sram.c -@@ -287,6 +287,7 @@ EXPORT_SYMBOL(sunxi_sram_release); - struct sunxi_sramc_variant { - int num_emac_clocks; - bool has_ldo_ctrl; -+ bool has_ths_offset; - }; - - static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { -@@ -308,8 +309,10 @@ static const struct sunxi_sramc_variant - - static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = { - .num_emac_clocks = 2, -+ .has_ths_offset = true, - }; - -+#define SUNXI_SRAM_THS_OFFSET_REG 0x0 - #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 - #define SUNXI_SYS_LDO_CTRL_REG 0x150 - -@@ -318,6 +321,8 @@ static bool sunxi_sram_regmap_accessible - { - const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev); - -+ if (reg == SUNXI_SRAM_THS_OFFSET_REG && variant->has_ths_offset) -+ return true; - if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG && - reg < SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4) - return true; -@@ -327,6 +332,20 @@ static bool sunxi_sram_regmap_accessible - return false; - } - -+static void sunxi_sram_lock(void *_lock) -+{ -+ spinlock_t *lock = _lock; -+ -+ spin_lock(lock); -+} -+ -+static void sunxi_sram_unlock(void *_lock) -+{ -+ spinlock_t *lock = _lock; -+ -+ spin_unlock(lock); -+} -+ - static struct regmap_config sunxi_sram_regmap_config = { - .reg_bits = 32, - .val_bits = 32, -@@ -336,6 +355,9 @@ static struct regmap_config sunxi_sram_r - /* other devices have no business accessing other registers */ - .readable_reg = sunxi_sram_regmap_accessible_reg, - .writeable_reg = sunxi_sram_regmap_accessible_reg, -+ .lock = sunxi_sram_lock, -+ .unlock = sunxi_sram_unlock, -+ .lock_arg = &sram_lock, - }; - - static int __init sunxi_sram_probe(struct platform_device *pdev) diff --git a/target/linux/sunxi/patches-6.6/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch b/target/linux/sunxi/patches-6.6/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch deleted file mode 100644 index 66f576eb386..00000000000 --- a/target/linux/sunxi/patches-6.6/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch +++ /dev/null @@ -1,47 +0,0 @@ -From ebbf19e36d021f253425344b4d4b987f3b7d9be5 Mon Sep 17 00:00:00 2001 -From: Maxim Kiselev -Date: Mon, 18 Dec 2023 00:06:23 +0300 -Subject: [PATCH] thermal/drivers/sun8i: Add D1/T113s THS controller support - -This patch adds a thermal sensor controller support for the D1/T113s, -which is similar to the one on H6, but with only one sensor and -different scale and offset values. - -Signed-off-by: Maxim Kiselev -Acked-by: Jernej Skrabec -Reviewed-by: Andre Przywara -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20231217210629.131486-3-bigunclemax@gmail.com ---- - drivers/thermal/sun8i_thermal.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/drivers/thermal/sun8i_thermal.c -+++ b/drivers/thermal/sun8i_thermal.c -@@ -606,6 +606,18 @@ static const struct ths_thermal_chip sun - .calc_temp = sun8i_ths_calc_temp, - }; - -+static const struct ths_thermal_chip sun20i_d1_ths = { -+ .sensor_num = 1, -+ .has_bus_clk_reset = true, -+ .offset = 188552, -+ .scale = 673, -+ .temp_data_base = SUN50I_H6_THS_TEMP_DATA, -+ .calibrate = sun50i_h6_ths_calibrate, -+ .init = sun50i_h6_thermal_init, -+ .irq_ack = sun50i_h6_irq_ack, -+ .calc_temp = sun8i_ths_calc_temp, -+}; -+ - static const struct of_device_id of_ths_match[] = { - { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths }, - { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, -@@ -614,6 +626,7 @@ static const struct of_device_id of_ths_ - { .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths }, - { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, - { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, -+ { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths }, - { /* sentinel */ }, - }; - MODULE_DEVICE_TABLE(of, of_ths_match); diff --git a/target/linux/sunxi/patches-6.6/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch b/target/linux/sunxi/patches-6.6/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch deleted file mode 100644 index b8138a38703..00000000000 --- a/target/linux/sunxi/patches-6.6/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 14f118aa50fe7c7c7330f56d007ecacca487cea8 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Mon, 19 Feb 2024 15:36:35 +0000 -Subject: [PATCH] thermal/drivers/sun8i: Explain unknown H6 register value - -So far we were ORing in some "unknown" value into the THS control -register on the Allwinner H6. This part of the register is not explained -in the H6 manual, but the H616 manual details those bits, and on closer -inspection the THS IP blocks in both SoCs seem very close: -- The BSP code for both SoCs writes the same values into THS_CTRL. -- The reset values of at least the first three registers are the same. - -Replace the "unknown" value with its proper meaning: "acquire time", -most probably the sample part of the sample & hold circuit of the ADC, -according to its explanation in the H616 manual. - -No functional change, just a macro rename and adjustment. - -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Acked-by: Vasily Khoruzhick -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20240219153639.179814-4-andre.przywara@arm.com ---- - drivers/thermal/sun8i_thermal.c | 29 ++++++++++++++++------------- - 1 file changed, 16 insertions(+), 13 deletions(-) - ---- a/drivers/thermal/sun8i_thermal.c -+++ b/drivers/thermal/sun8i_thermal.c -@@ -50,7 +50,8 @@ - #define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16) - #define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8) - --#define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16) -+#define SUN50I_THS_CTRL0_T_ACQ(x) (GENMASK(15, 0) & ((x) - 1)) -+#define SUN50I_THS_CTRL0_T_SAMPLE_PER(x) ((GENMASK(15, 0) & ((x) - 1)) << 16) - #define SUN50I_THS_FILTER_EN BIT(2) - #define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) - #define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12) -@@ -410,25 +411,27 @@ static int sun8i_h3_thermal_init(struct - return 0; - } - --/* -- * Without this undocumented value, the returned temperatures would -- * be higher than real ones by about 20C. -- */ --#define SUN50I_H6_CTRL0_UNK 0x0000002f -- - static int sun50i_h6_thermal_init(struct ths_device *tmdev) - { - int val; - - /* -- * T_acq = 20us -- * clkin = 24MHz -- * -- * x = T_acq * clkin - 1 -- * = 479 -+ * The manual recommends an overall sample frequency of 50 KHz (20us, -+ * 480 cycles at 24 MHz), which provides plenty of time for both the -+ * acquisition time (>24 cycles) and the actual conversion time -+ * (>14 cycles). -+ * The lower half of the CTRL register holds the "acquire time", in -+ * clock cycles, which the manual recommends to be 2us: -+ * 24MHz * 2us = 48 cycles. -+ * The high half of THS_CTRL encodes the sample frequency, in clock -+ * cycles: 24MHz * 20us = 480 cycles. -+ * This is explained in the H616 manual, but apparently wrongly -+ * described in the H6 manual, although the BSP code does the same -+ * for both SoCs. - */ - regmap_write(tmdev->regmap, SUN50I_THS_CTRL0, -- SUN50I_H6_CTRL0_UNK | SUN50I_THS_CTRL0_T_ACQ(479)); -+ SUN50I_THS_CTRL0_T_ACQ(48) | -+ SUN50I_THS_CTRL0_T_SAMPLE_PER(480)); - /* average over 4 samples */ - regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC, - SUN50I_THS_FILTER_EN | diff --git a/target/linux/sunxi/patches-6.6/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch b/target/linux/sunxi/patches-6.6/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch deleted file mode 100644 index a0dbad48c93..00000000000 --- a/target/linux/sunxi/patches-6.6/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 6c04a419a4c5fb18edefc44dd676fb95c7f6c55d Mon Sep 17 00:00:00 2001 -From: Maksim Kiselev -Date: Mon, 19 Feb 2024 15:36:36 +0000 -Subject: [PATCH] thermal/drivers/sun8i: Extend H6 calibration to support 4 - sensors - -The H616 SoC resembles the H6 thermal sensor controller, with a few -changes like four sensors. - -Extend sun50i_h6_ths_calibrate() function to support calibration of -these sensors. - -Co-developed-by: Martin Botka -Signed-off-by: Martin Botka -Signed-off-by: Maksim Kiselev -Reviewed-by: Andre Przywara -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Acked-by: Vasily Khoruzhick -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20240219153639.179814-5-andre.przywara@arm.com ---- - drivers/thermal/sun8i_thermal.c | 28 ++++++++++++++++++++-------- - 1 file changed, 20 insertions(+), 8 deletions(-) - ---- a/drivers/thermal/sun8i_thermal.c -+++ b/drivers/thermal/sun8i_thermal.c -@@ -222,16 +222,21 @@ static int sun50i_h6_ths_calibrate(struc - struct device *dev = tmdev->dev; - int i, ft_temp; - -- if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) -+ if (!caldata[0]) - return -EINVAL; - - /* - * efuse layout: - * -- * 0 11 16 32 -- * +-------+-------+-------+ -- * |temp| |sensor0|sensor1| -- * +-------+-------+-------+ -+ * 0 11 16 27 32 43 48 57 -+ * +----------+-----------+-----------+-----------+ -+ * | temp | |sensor0| |sensor1| |sensor2| | -+ * +----------+-----------+-----------+-----------+ -+ * ^ ^ ^ -+ * | | | -+ * | | sensor3[11:8] -+ * | sensor3[7:4] -+ * sensor3[3:0] - * - * The calibration data on the H6 is the ambient temperature and - * sensor values that are filled during the factory test stage. -@@ -244,9 +249,16 @@ static int sun50i_h6_ths_calibrate(struc - ft_temp = (caldata[0] & FT_TEMP_MASK) * 100; - - for (i = 0; i < tmdev->chip->sensor_num; i++) { -- int sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK; -- int cdata, offset; -- int sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg); -+ int sensor_reg, sensor_temp, cdata, offset; -+ -+ if (i == 3) -+ sensor_reg = (caldata[1] >> 12) -+ | ((caldata[2] >> 12) << 4) -+ | ((caldata[3] >> 12) << 8); -+ else -+ sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK; -+ -+ sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg); - - /* - * Calibration data is CALIBRATE_DEFAULT - (calculated diff --git a/target/linux/sunxi/patches-6.6/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch b/target/linux/sunxi/patches-6.6/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch deleted file mode 100644 index 9b5e9d374fd..00000000000 --- a/target/linux/sunxi/patches-6.6/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch +++ /dev/null @@ -1,126 +0,0 @@ -From f8b54d1120b81ed57bed96cc8e814ba08886d1e5 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Mon, 19 Feb 2024 15:36:37 +0000 -Subject: [PATCH] thermal/drivers/sun8i: Add SRAM register access code - -The Allwinner H616 SoC needs to clear a bit in one register in the SRAM -controller, to report reasonable temperature values. On reset, bit 16 in -register 0x3000000 is set, which leads to the driver reporting -temperatures around 200C. Clearing this bit brings the values down to the -expected range. The BSP code does a one-time write in U-Boot, with a -comment just mentioning the effect on the THS, but offering no further -explanation. - -To not rely on firmware to set things up for us, add code that queries -the SRAM controller device via a DT phandle link, then clear just this -single bit. - -Signed-off-by: Andre Przywara -Acked-by: Vasily Khoruzhick -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20240219153639.179814-6-andre.przywara@arm.com ---- - drivers/thermal/sun8i_thermal.c | 51 +++++++++++++++++++++++++++++++++ - 1 file changed, 51 insertions(+) - ---- a/drivers/thermal/sun8i_thermal.c -+++ b/drivers/thermal/sun8i_thermal.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -66,6 +67,7 @@ struct tsensor { - struct ths_thermal_chip { - bool has_mod_clk; - bool has_bus_clk_reset; -+ bool needs_sram; - int sensor_num; - int offset; - int scale; -@@ -83,12 +85,16 @@ struct ths_device { - const struct ths_thermal_chip *chip; - struct device *dev; - struct regmap *regmap; -+ struct regmap_field *sram_regmap_field; - struct reset_control *reset; - struct clk *bus_clk; - struct clk *mod_clk; - struct tsensor sensor[MAX_SENSOR_NUM]; - }; - -+/* The H616 needs to have a bit 16 in the SRAM control register cleared. */ -+static const struct reg_field sun8i_ths_sram_reg_field = REG_FIELD(0x0, 16, 16); -+ - /* Temp Unit: millidegree Celsius */ - static int sun8i_ths_calc_temp(struct ths_device *tmdev, - int id, int reg) -@@ -337,6 +343,34 @@ static void sun8i_ths_reset_control_asse - reset_control_assert(data); - } - -+static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node) -+{ -+ struct device_node *sram_node; -+ struct platform_device *sram_pdev; -+ struct regmap *regmap = NULL; -+ -+ sram_node = of_parse_phandle(node, "allwinner,sram", 0); -+ if (!sram_node) -+ return ERR_PTR(-ENODEV); -+ -+ sram_pdev = of_find_device_by_node(sram_node); -+ if (!sram_pdev) { -+ /* platform device might not be probed yet */ -+ regmap = ERR_PTR(-EPROBE_DEFER); -+ goto out_put_node; -+ } -+ -+ /* If no regmap is found then the other device driver is at fault */ -+ regmap = dev_get_regmap(&sram_pdev->dev, NULL); -+ if (!regmap) -+ regmap = ERR_PTR(-EINVAL); -+ -+ platform_device_put(sram_pdev); -+out_put_node: -+ of_node_put(sram_node); -+ return regmap; -+} -+ - static int sun8i_ths_resource_init(struct ths_device *tmdev) - { - struct device *dev = tmdev->dev; -@@ -381,6 +415,19 @@ static int sun8i_ths_resource_init(struc - if (ret) - return ret; - -+ if (tmdev->chip->needs_sram) { -+ struct regmap *regmap; -+ -+ regmap = sun8i_ths_get_sram_regmap(dev->of_node); -+ if (IS_ERR(regmap)) -+ return PTR_ERR(regmap); -+ tmdev->sram_regmap_field = devm_regmap_field_alloc(dev, -+ regmap, -+ sun8i_ths_sram_reg_field); -+ if (IS_ERR(tmdev->sram_regmap_field)) -+ return PTR_ERR(tmdev->sram_regmap_field); -+ } -+ - ret = sun8i_ths_calibrate(tmdev); - if (ret) - return ret; -@@ -427,6 +474,10 @@ static int sun50i_h6_thermal_init(struct - { - int val; - -+ /* The H616 needs to have a bit in the SRAM control register cleared. */ -+ if (tmdev->sram_regmap_field) -+ regmap_field_write(tmdev->sram_regmap_field, 0); -+ - /* - * The manual recommends an overall sample frequency of 50 KHz (20us, - * 480 cycles at 24 MHz), which provides plenty of time for both the diff --git a/target/linux/sunxi/patches-6.6/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch b/target/linux/sunxi/patches-6.6/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch deleted file mode 100644 index 187bc0dd7b0..00000000000 --- a/target/linux/sunxi/patches-6.6/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch +++ /dev/null @@ -1,50 +0,0 @@ -From e7dbfa19572a1440a2e67ef70f94ff204849a0a8 Mon Sep 17 00:00:00 2001 -From: Martin Botka -Date: Mon, 19 Feb 2024 15:36:38 +0000 -Subject: [PATCH] thermal/drivers/sun8i: Add support for H616 THS controller - -Add support for the thermal sensor found in H616 SoCs, is the same as -the H6 thermal sensor controller, but with four sensors. -Also the registers readings are wrong, unless a bit in the first SYS_CFG -register cleared, so set exercise the SRAM regmap to take care of that. - -Signed-off-by: Martin Botka -Signed-off-by: Andre Przywara -Acked-by: Vasily Khoruzhick -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20240219153639.179814-7-andre.przywara@arm.com ---- - drivers/thermal/sun8i_thermal.c | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - ---- a/drivers/thermal/sun8i_thermal.c -+++ b/drivers/thermal/sun8i_thermal.c -@@ -684,6 +684,20 @@ static const struct ths_thermal_chip sun - .calc_temp = sun8i_ths_calc_temp, - }; - -+static const struct ths_thermal_chip sun50i_h616_ths = { -+ .sensor_num = 4, -+ .has_bus_clk_reset = true, -+ .needs_sram = true, -+ .ft_deviation = 8000, -+ .offset = 263655, -+ .scale = 810, -+ .temp_data_base = SUN50I_H6_THS_TEMP_DATA, -+ .calibrate = sun50i_h6_ths_calibrate, -+ .init = sun50i_h6_thermal_init, -+ .irq_ack = sun50i_h6_irq_ack, -+ .calc_temp = sun8i_ths_calc_temp, -+}; -+ - static const struct of_device_id of_ths_match[] = { - { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths }, - { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, -@@ -693,6 +707,7 @@ static const struct of_device_id of_ths_ - { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, - { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, - { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths }, -+ { .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths }, - { /* sentinel */ }, - }; - MODULE_DEVICE_TABLE(of, of_ths_match); diff --git a/target/linux/sunxi/patches-6.6/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch b/target/linux/sunxi/patches-6.6/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch deleted file mode 100644 index dd18cd953c3..00000000000 --- a/target/linux/sunxi/patches-6.6/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 9ac53d5532cc4bb595bbee86ccba2172ccc336c3 Mon Sep 17 00:00:00 2001 -From: Mark Brown -Date: Tue, 23 Jan 2024 23:33:07 +0000 -Subject: [PATCH] thermal/drivers/sun8i: Don't fail probe due to zone - registration failure - -Currently the sun8i thermal driver will fail to probe if any of the -thermal zones it is registering fails to register with the thermal core. -Since we currently do not define any trip points for the GPU thermal -zones on at least A64 or H5 this means that we have no thermal support -on these platforms: - -[ 1.698703] thermal_sys: Failed to find 'trips' node -[ 1.698707] thermal_sys: Failed to find trip points for thermal-sensor id=1 - -even though the main CPU thermal zone on both SoCs is fully configured. -This does not seem ideal, while we may not be able to use all the zones -it seems better to have those zones which are usable be operational. -Instead just carry on registering zones if we get any non-deferral -error, allowing use of those zones which are usable. - -This means that we also need to update the interrupt handler to not -attempt to notify the core for events on zones which we have not -registered, I didn't see an ability to mask individual interrupts and -I would expect that interrupts would still be indicated in the ISR even -if they were masked. - -Reviewed-by: Vasily Khoruzhick -Acked-by: Jernej Skrabec -Signed-off-by: Mark Brown -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20240123-thermal-sun8i-registration-v3-1-3e5771b1bbdd@kernel.org ---- - drivers/thermal/sun8i_thermal.c | 16 ++++++++++++++-- - 1 file changed, 14 insertions(+), 2 deletions(-) - ---- a/drivers/thermal/sun8i_thermal.c -+++ b/drivers/thermal/sun8i_thermal.c -@@ -195,6 +195,9 @@ static irqreturn_t sun8i_irq_thread(int - int i; - - for_each_set_bit(i, &irq_bitmap, tmdev->chip->sensor_num) { -+ /* We allow some zones to not register. */ -+ if (IS_ERR(tmdev->sensor[i].tzd)) -+ continue; - thermal_zone_device_update(tmdev->sensor[i].tzd, - THERMAL_EVENT_UNSPECIFIED); - } -@@ -531,8 +534,17 @@ static int sun8i_ths_register(struct ths - i, - &tmdev->sensor[i], - &ths_ops); -- if (IS_ERR(tmdev->sensor[i].tzd)) -- return PTR_ERR(tmdev->sensor[i].tzd); -+ -+ /* -+ * If an individual zone fails to register for reasons -+ * other than probe deferral (eg, a bad DT) then carry -+ * on, other zones might register successfully. -+ */ -+ if (IS_ERR(tmdev->sensor[i].tzd)) { -+ if (PTR_ERR(tmdev->sensor[i].tzd) == -EPROBE_DEFER) -+ return PTR_ERR(tmdev->sensor[i].tzd); -+ continue; -+ } - - devm_thermal_add_hwmon_sysfs(tmdev->dev, tmdev->sensor[i].tzd); - } diff --git a/target/linux/sunxi/patches-6.6/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch b/target/linux/sunxi/patches-6.6/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch deleted file mode 100644 index cd6542bf144..00000000000 --- a/target/linux/sunxi/patches-6.6/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch +++ /dev/null @@ -1,138 +0,0 @@ -From f4318af40544b8e7ff5a6b667ede60e6cf808262 Mon Sep 17 00:00:00 2001 -From: Martin Botka -Date: Mon, 19 Feb 2024 15:36:39 +0000 -Subject: [PATCH] arm64: dts: allwinner: h616: Add thermal sensor and zones - -There are four thermal sensors: -- CPU -- GPU -- VE -- DRAM - -Add the thermal sensor configuration and the thermal zones. - -Signed-off-by: Martin Botka -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Link: https://lore.kernel.org/r/20240219153639.179814-8-andre.przywara@arm.com -Signed-off-by: Jernej Skrabec ---- - .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 88 +++++++++++++++++++ - 1 file changed, 88 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -138,6 +139,10 @@ - reg = <0x03006000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; -+ -+ ths_calibration: thermal-sensor-calibration@14 { -+ reg = <0x14 0x8>; -+ }; - }; - - watchdog: watchdog@30090a0 { -@@ -511,6 +516,19 @@ - }; - }; - -+ ths: thermal-sensor@5070400 { -+ compatible = "allwinner,sun50i-h616-ths"; -+ reg = <0x05070400 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_THS>; -+ clock-names = "bus"; -+ resets = <&ccu RST_BUS_THS>; -+ nvmem-cells = <&ths_calibration>; -+ nvmem-cell-names = "calibration"; -+ allwinner,sram = <&syscon>; -+ #thermal-sensor-cells = <1>; -+ }; -+ - usbotg: usb@5100000 { - compatible = "allwinner,sun50i-h616-musb", - "allwinner,sun8i-h3-musb"; -@@ -755,4 +773,74 @@ - #size-cells = <0>; - }; - }; -+ -+ thermal-zones { -+ cpu-thermal { -+ polling-delay-passive = <500>; -+ polling-delay = <1000>; -+ thermal-sensors = <&ths 2>; -+ sustainable-power = <1000>; -+ -+ trips { -+ cpu_threshold: cpu-trip-0 { -+ temperature = <60000>; -+ type = "passive"; -+ hysteresis = <0>; -+ }; -+ cpu_target: cpu-trip-1 { -+ temperature = <70000>; -+ type = "passive"; -+ hysteresis = <0>; -+ }; -+ cpu_critical: cpu-trip-2 { -+ temperature = <110000>; -+ type = "critical"; -+ hysteresis = <0>; -+ }; -+ }; -+ }; -+ -+ gpu-thermal { -+ polling-delay-passive = <500>; -+ polling-delay = <1000>; -+ thermal-sensors = <&ths 0>; -+ sustainable-power = <1100>; -+ -+ trips { -+ gpu_temp_critical: gpu-trip-0 { -+ temperature = <110000>; -+ type = "critical"; -+ hysteresis = <0>; -+ }; -+ }; -+ }; -+ -+ ve-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 1>; -+ -+ trips { -+ ve_temp_critical: ve-trip-0 { -+ temperature = <110000>; -+ type = "critical"; -+ hysteresis = <0>; -+ }; -+ }; -+ }; -+ -+ ddr-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 3>; -+ -+ trips { -+ ddr_temp_critical: ddr-trip-0 { -+ temperature = <110000>; -+ type = "critical"; -+ hysteresis = <0>; -+ }; -+ }; -+ }; -+ }; - }; diff --git a/target/linux/sunxi/patches-6.6/017-v6.10-firmware-smccc-Export-revision-soc_id-function.patch b/target/linux/sunxi/patches-6.6/017-v6.10-firmware-smccc-Export-revision-soc_id-function.patch deleted file mode 100644 index aacd0ba9067..00000000000 --- a/target/linux/sunxi/patches-6.6/017-v6.10-firmware-smccc-Export-revision-soc_id-function.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 9cf3415ade2d7598d78d2ce6d35d6d6d06132201 Mon Sep 17 00:00:00 2001 -From: Martin Botka -Date: Thu, 18 Apr 2024 16:44:01 +0100 -Subject: [PATCH] firmware: smccc: Export revision soc_id function - -The "SoC ID revision" as provided via the SMCCC SOCID interface can be -valuable information for drivers, when certain functionality depends -on a die revision, for instance. -One example is the sun50i-cpufreq-nvmem driver, which needs this -information to determine the speed bin of the SoC. - -Export the arm_smccc_get_soc_id_revision() function so that it can be -called by any driver. - -Signed-off-by: Martin Botka -Signed-off-by: Andre Przywara -Acked-by: Sudeep Holla -Signed-off-by: Viresh Kumar ---- - drivers/firmware/smccc/smccc.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/firmware/smccc/smccc.c -+++ b/drivers/firmware/smccc/smccc.c -@@ -65,6 +65,7 @@ s32 arm_smccc_get_soc_id_revision(void) - { - return smccc_soc_id_revision; - } -+EXPORT_SYMBOL_GPL(arm_smccc_get_soc_id_revision); - - static int __init smccc_devices_init(void) - { diff --git a/target/linux/sunxi/patches-6.6/018-v6.10-cpufreq-dt-platdev-Blocklist-Allwinner-H616-618-SoCs.patch b/target/linux/sunxi/patches-6.6/018-v6.10-cpufreq-dt-platdev-Blocklist-Allwinner-H616-618-SoCs.patch deleted file mode 100644 index d67b35ee712..00000000000 --- a/target/linux/sunxi/patches-6.6/018-v6.10-cpufreq-dt-platdev-Blocklist-Allwinner-H616-618-SoCs.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6ae07744cf334b750762ba881492c0cfba524b38 Mon Sep 17 00:00:00 2001 -From: Martin Botka -Date: Thu, 18 Apr 2024 16:44:02 +0100 -Subject: [PATCH] cpufreq: dt-platdev: Blocklist Allwinner H616/618 SoCs - -The AllWinner H616 SoC will use the (extended) H6 OPP driver, so add -them to the cpufreq-dt blocklist, to not create the device twice. -This also affects the closely related sibling SoCs H618 and H700. - -Signed-off-by: Martin Botka -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Signed-off-by: Viresh Kumar ---- - drivers/cpufreq/cpufreq-dt-platdev.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/cpufreq/cpufreq-dt-platdev.c -+++ b/drivers/cpufreq/cpufreq-dt-platdev.c -@@ -104,6 +104,9 @@ static const struct of_device_id allowli - */ - static const struct of_device_id blocklist[] __initconst = { - { .compatible = "allwinner,sun50i-h6", }, -+ { .compatible = "allwinner,sun50i-h616", }, -+ { .compatible = "allwinner,sun50i-h618", }, -+ { .compatible = "allwinner,sun50i-h700", }, - - { .compatible = "apple,arm-platform", }, - diff --git a/target/linux/sunxi/patches-6.6/019-v6.10-cpufreq-sun50i-Refactor-speed-bin-decoding.patch b/target/linux/sunxi/patches-6.6/019-v6.10-cpufreq-sun50i-Refactor-speed-bin-decoding.patch deleted file mode 100644 index 9a819069964..00000000000 --- a/target/linux/sunxi/patches-6.6/019-v6.10-cpufreq-sun50i-Refactor-speed-bin-decoding.patch +++ /dev/null @@ -1,149 +0,0 @@ -From 6cc4bcceff9af0e6be9738096d95e4ba75e75123 Mon Sep 17 00:00:00 2001 -From: Brandon Cheo Fusi -Date: Thu, 18 Apr 2024 16:44:04 +0100 -Subject: [PATCH] cpufreq: sun50i: Refactor speed bin decoding - -Make converting the speed bin value into a speed grade generic and -determined by a platform specific callback. Also change the prototypes -involved to encode the speed bin directly in the return value. - -This allows to extend the driver more easily to support more SoCs. - -Signed-off-by: Brandon Cheo Fusi -[Andre: merge output into return value] -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Signed-off-by: Viresh Kumar ---- - drivers/cpufreq/sun50i-cpufreq-nvmem.c | 74 +++++++++++++++++--------- - 1 file changed, 49 insertions(+), 25 deletions(-) - ---- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c -+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c -@@ -25,19 +25,52 @@ - - static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev; - -+struct sunxi_cpufreq_data { -+ u32 (*efuse_xlate)(u32 speedbin); -+}; -+ -+static u32 sun50i_h6_efuse_xlate(u32 speedbin) -+{ -+ u32 efuse_value; -+ -+ efuse_value = (speedbin >> NVMEM_SHIFT) & NVMEM_MASK; -+ -+ /* -+ * We treat unexpected efuse values as if the SoC was from -+ * the slowest bin. Expected efuse values are 1-3, slowest -+ * to fastest. -+ */ -+ if (efuse_value >= 1 && efuse_value <= 3) -+ return efuse_value - 1; -+ else -+ return 0; -+} -+ -+static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data = { -+ .efuse_xlate = sun50i_h6_efuse_xlate, -+}; -+ -+static const struct of_device_id cpu_opp_match_list[] = { -+ { .compatible = "allwinner,sun50i-h6-operating-points", -+ .data = &sun50i_h6_cpufreq_data, -+ }, -+ {} -+}; -+ - /** - * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value -- * @versions: Set to the value parsed from efuse - * -- * Returns 0 if success. -+ * Returns non-negative speed bin index on success, a negative error -+ * value otherwise. - */ --static int sun50i_cpufreq_get_efuse(u32 *versions) -+static int sun50i_cpufreq_get_efuse(void) - { -+ const struct sunxi_cpufreq_data *opp_data; - struct nvmem_cell *speedbin_nvmem; -+ const struct of_device_id *match; - struct device_node *np; - struct device *cpu_dev; -- u32 *speedbin, efuse_value; -- size_t len; -+ u32 *speedbin; - int ret; - - cpu_dev = get_cpu_device(0); -@@ -48,12 +81,12 @@ static int sun50i_cpufreq_get_efuse(u32 - if (!np) - return -ENOENT; - -- ret = of_device_is_compatible(np, -- "allwinner,sun50i-h6-operating-points"); -- if (!ret) { -+ match = of_match_node(cpu_opp_match_list, np); -+ if (!match) { - of_node_put(np); - return -ENOENT; - } -+ opp_data = match->data; - - speedbin_nvmem = of_nvmem_cell_get(np, NULL); - of_node_put(np); -@@ -61,25 +94,16 @@ static int sun50i_cpufreq_get_efuse(u32 - return dev_err_probe(cpu_dev, PTR_ERR(speedbin_nvmem), - "Could not get nvmem cell\n"); - -- speedbin = nvmem_cell_read(speedbin_nvmem, &len); -+ speedbin = nvmem_cell_read(speedbin_nvmem, NULL); - nvmem_cell_put(speedbin_nvmem); - if (IS_ERR(speedbin)) - return PTR_ERR(speedbin); - -- efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK; -- -- /* -- * We treat unexpected efuse values as if the SoC was from -- * the slowest bin. Expected efuse values are 1-3, slowest -- * to fastest. -- */ -- if (efuse_value >= 1 && efuse_value <= 3) -- *versions = efuse_value - 1; -- else -- *versions = 0; -+ ret = opp_data->efuse_xlate(*speedbin); - - kfree(speedbin); -- return 0; -+ -+ return ret; - }; - - static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) -@@ -87,7 +111,7 @@ static int sun50i_cpufreq_nvmem_probe(st - int *opp_tokens; - char name[MAX_NAME_LEN]; - unsigned int cpu; -- u32 speed = 0; -+ int speed; - int ret; - - opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens), -@@ -95,10 +119,10 @@ static int sun50i_cpufreq_nvmem_probe(st - if (!opp_tokens) - return -ENOMEM; - -- ret = sun50i_cpufreq_get_efuse(&speed); -- if (ret) { -+ speed = sun50i_cpufreq_get_efuse(); -+ if (speed < 0) { - kfree(opp_tokens); -- return ret; -+ return speed; - } - - snprintf(name, MAX_NAME_LEN, "speed%d", speed); diff --git a/target/linux/sunxi/patches-6.6/020-v6.10-cpufreq-sun50i-Add-support-for-opp_supported_hw.patch b/target/linux/sunxi/patches-6.6/020-v6.10-cpufreq-sun50i-Add-support-for-opp_supported_hw.patch deleted file mode 100644 index e0c68f9aad6..00000000000 --- a/target/linux/sunxi/patches-6.6/020-v6.10-cpufreq-sun50i-Add-support-for-opp_supported_hw.patch +++ /dev/null @@ -1,132 +0,0 @@ -From fa5aec9561cfc4f4370983ca5818c90227c9d90e Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Thu, 18 Apr 2024 16:44:05 +0100 -Subject: [PATCH] cpufreq: sun50i: Add support for opp_supported_hw - -The opp_supported_hw DT property allows the DT to specify a mask of chip -revisions that a certain OPP is eligible for. This allows for easy -limiting of maximum frequencies, for instance. - -Add support for that in the sun50i-cpufreq-nvmem driver. We support both -the existing opp-microvolt suffix properties as well as the -opp-supported-hw property, the generic code figures out which is needed -automatically. -However if none of the DT OPP nodes contain an opp-supported-hw -property, the core code will ignore all OPPs and the driver will fail -probing. So check the DT's eligibility first before using that feature. - -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Signed-off-by: Viresh Kumar ---- - drivers/cpufreq/sun50i-cpufreq-nvmem.c | 62 ++++++++++++++++++++++---- - 1 file changed, 54 insertions(+), 8 deletions(-) - ---- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c -+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c -@@ -58,6 +58,41 @@ static const struct of_device_id cpu_opp - }; - - /** -+ * dt_has_supported_hw() - Check if any OPPs use opp-supported-hw -+ * -+ * If we ask the cpufreq framework to use the opp-supported-hw feature, it -+ * will ignore every OPP node without that DT property. If none of the OPPs -+ * have it, the driver will fail probing, due to the lack of OPPs. -+ * -+ * Returns true if we have at least one OPP with the opp-supported-hw property. -+ */ -+static bool dt_has_supported_hw(void) -+{ -+ bool has_opp_supported_hw = false; -+ struct device_node *np, *opp; -+ struct device *cpu_dev; -+ -+ cpu_dev = get_cpu_device(0); -+ if (!cpu_dev) -+ return -ENODEV; -+ -+ np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); -+ if (!np) -+ return -ENOENT; -+ -+ for_each_child_of_node(np, opp) { -+ if (of_find_property(opp, "opp-supported-hw", NULL)) { -+ has_opp_supported_hw = true; -+ break; -+ } -+ } -+ -+ of_node_put(np); -+ -+ return has_opp_supported_hw; -+} -+ -+/** - * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value - * - * Returns non-negative speed bin index on success, a negative error -@@ -110,7 +145,8 @@ static int sun50i_cpufreq_nvmem_probe(st - { - int *opp_tokens; - char name[MAX_NAME_LEN]; -- unsigned int cpu; -+ unsigned int cpu, supported_hw; -+ struct dev_pm_opp_config config = {}; - int speed; - int ret; - -@@ -125,7 +161,18 @@ static int sun50i_cpufreq_nvmem_probe(st - return speed; - } - -+ /* -+ * We need at least one OPP with the "opp-supported-hw" property, -+ * or else the upper layers will ignore every OPP and will bail out. -+ */ -+ if (dt_has_supported_hw()) { -+ supported_hw = 1U << speed; -+ config.supported_hw = &supported_hw; -+ config.supported_hw_count = 1; -+ } -+ - snprintf(name, MAX_NAME_LEN, "speed%d", speed); -+ config.prop_name = name; - - for_each_possible_cpu(cpu) { - struct device *cpu_dev = get_cpu_device(cpu); -@@ -135,12 +182,11 @@ static int sun50i_cpufreq_nvmem_probe(st - goto free_opp; - } - -- opp_tokens[cpu] = dev_pm_opp_set_prop_name(cpu_dev, name); -- if (opp_tokens[cpu] < 0) { -- ret = opp_tokens[cpu]; -- pr_err("Failed to set prop name\n"); -+ ret = dev_pm_opp_set_config(cpu_dev, &config); -+ if (ret < 0) - goto free_opp; -- } -+ -+ opp_tokens[cpu] = ret; - } - - cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1, -@@ -155,7 +201,7 @@ static int sun50i_cpufreq_nvmem_probe(st - - free_opp: - for_each_possible_cpu(cpu) -- dev_pm_opp_put_prop_name(opp_tokens[cpu]); -+ dev_pm_opp_clear_config(opp_tokens[cpu]); - kfree(opp_tokens); - - return ret; -@@ -169,7 +215,7 @@ static void sun50i_cpufreq_nvmem_remove( - platform_device_unregister(cpufreq_dt_pdev); - - for_each_possible_cpu(cpu) -- dev_pm_opp_put_prop_name(opp_tokens[cpu]); -+ dev_pm_opp_clear_config(opp_tokens[cpu]); - - kfree(opp_tokens); - } diff --git a/target/linux/sunxi/patches-6.6/021-v6.10-cpufreq-sun50i-Add-H616-support.patch b/target/linux/sunxi/patches-6.6/021-v6.10-cpufreq-sun50i-Add-H616-support.patch deleted file mode 100644 index c891f5722a5..00000000000 --- a/target/linux/sunxi/patches-6.6/021-v6.10-cpufreq-sun50i-Add-H616-support.patch +++ /dev/null @@ -1,122 +0,0 @@ -From e2e2dcd2e944fe6167cb731864f8a1343f1bbee7 Mon Sep 17 00:00:00 2001 -From: Martin Botka -Date: Thu, 18 Apr 2024 16:44:06 +0100 -Subject: [PATCH] cpufreq: sun50i: Add H616 support - -The Allwinner H616/H618 SoCs have different OPP tables per SoC version -and die revision. The SoC version is stored in NVMEM, as before, though -encoded differently. The die revision is in a different register, in the -SRAM controller. Firmware already exports that value in a standardised -way, through the SMCCC SoCID mechanism. We need both values, as some chips -have the same SoC version, but they don't support the same frequencies and -they get differentiated by the die revision. - -Add the new compatible string and tie the new translation function to -it. This mechanism not only covers the original H616 SoC, but also its -very close sibling SoCs H618 and H700, so add them to the list as well. - -Signed-off-by: Martin Botka -Signed-off-by: Andre Przywara -Signed-off-by: Viresh Kumar ---- - drivers/cpufreq/sun50i-cpufreq-nvmem.c | 67 ++++++++++++++++++++++++++ - 1 file changed, 67 insertions(+) - ---- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c -+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c -@@ -10,6 +10,7 @@ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -+#include - #include - #include - #include -@@ -46,14 +47,77 @@ static u32 sun50i_h6_efuse_xlate(u32 spe - return 0; - } - -+static int get_soc_id_revision(void) -+{ -+#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY -+ return arm_smccc_get_soc_id_revision(); -+#else -+ return SMCCC_RET_NOT_SUPPORTED; -+#endif -+} -+ -+/* -+ * Judging by the OPP tables in the vendor BSP, the quality order of the -+ * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best. -+ * 0 and 2 seem identical from the OPP tables' point of view. -+ */ -+static u32 sun50i_h616_efuse_xlate(u32 speedbin) -+{ -+ int ver_bits = get_soc_id_revision(); -+ u32 value = 0; -+ -+ switch (speedbin & 0xffff) { -+ case 0x2000: -+ value = 0; -+ break; -+ case 0x2400: -+ case 0x7400: -+ case 0x2c00: -+ case 0x7c00: -+ if (ver_bits != SMCCC_RET_NOT_SUPPORTED && ver_bits <= 1) { -+ /* ic version A/B */ -+ value = 1; -+ } else { -+ /* ic version C and later version */ -+ value = 2; -+ } -+ break; -+ case 0x5000: -+ case 0x5400: -+ case 0x6000: -+ value = 3; -+ break; -+ case 0x5c00: -+ value = 4; -+ break; -+ case 0x5d00: -+ value = 0; -+ break; -+ default: -+ pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n", -+ speedbin & 0xffff); -+ value = 0; -+ break; -+ } -+ -+ return value; -+} -+ - static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data = { - .efuse_xlate = sun50i_h6_efuse_xlate, - }; - -+static struct sunxi_cpufreq_data sun50i_h616_cpufreq_data = { -+ .efuse_xlate = sun50i_h616_efuse_xlate, -+}; -+ - static const struct of_device_id cpu_opp_match_list[] = { - { .compatible = "allwinner,sun50i-h6-operating-points", - .data = &sun50i_h6_cpufreq_data, - }, -+ { .compatible = "allwinner,sun50i-h616-operating-points", -+ .data = &sun50i_h616_cpufreq_data, -+ }, - {} - }; - -@@ -230,6 +294,9 @@ static struct platform_driver sun50i_cpu - - static const struct of_device_id sun50i_cpufreq_match_list[] = { - { .compatible = "allwinner,sun50i-h6" }, -+ { .compatible = "allwinner,sun50i-h616" }, -+ { .compatible = "allwinner,sun50i-h618" }, -+ { .compatible = "allwinner,sun50i-h700" }, - {} - }; - MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list); diff --git a/target/linux/sunxi/patches-6.6/022-v6.10-arm64-dts-allwinner-h616-Add-CPU-OPPs-table.patch b/target/linux/sunxi/patches-6.6/022-v6.10-arm64-dts-allwinner-h616-Add-CPU-OPPs-table.patch deleted file mode 100644 index 4665286d0f4..00000000000 --- a/target/linux/sunxi/patches-6.6/022-v6.10-arm64-dts-allwinner-h616-Add-CPU-OPPs-table.patch +++ /dev/null @@ -1,188 +0,0 @@ -From 3e057e05b3b281bcc29db573eb51f87ee6b5afc0 Mon Sep 17 00:00:00 2001 -From: Martin Botka -Date: Thu, 18 Apr 2024 16:44:07 +0100 -Subject: [PATCH] arm64: dts: allwinner: h616: Add CPU OPPs table - -Add an Operating Performance Points table for the CPU cores to enable -Dynamic Voltage & Frequency Scaling (DVFS) on the H616. -The values were taken from the BSP sources. There is a separate OPP set -seen on some H700 devices, but they didn't really work out in testing, so -they are not included for now. - -Also add the needed cpu_speed_grade nvmem cell and the cooling cells -properties, to enable passive cooling. - -Signed-off-by: Martin Botka -[Andre: rework to minimise opp-microvolt properties] -Signed-off-by: Andre Przywara -Acked-by: Jernej Skrabec -Signed-off-by: Viresh Kumar ---- - .../dts/allwinner/sun50i-h616-cpu-opp.dtsi | 115 ++++++++++++++++++ - .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 8 ++ - 2 files changed, 123 insertions(+) - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi - ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi -@@ -0,0 +1,115 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2023 Martin Botka -+ -+/ { -+ cpu_opp_table: opp-table-cpu { -+ compatible = "allwinner,sun50i-h616-operating-points"; -+ nvmem-cells = <&cpu_speed_grade>; -+ opp-shared; -+ -+ opp-480000000 { -+ opp-hz = /bits/ 64 <480000000>; -+ opp-microvolt = <900000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x1f>; -+ }; -+ -+ opp-600000000 { -+ opp-hz = /bits/ 64 <600000000>; -+ opp-microvolt = <900000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x12>; -+ }; -+ -+ opp-720000000 { -+ opp-hz = /bits/ 64 <720000000>; -+ opp-microvolt = <900000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x0d>; -+ }; -+ -+ opp-792000000 { -+ opp-hz = /bits/ 64 <792000000>; -+ opp-microvolt-speed1 = <900000>; -+ opp-microvolt-speed4 = <940000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x12>; -+ }; -+ -+ opp-936000000 { -+ opp-hz = /bits/ 64 <936000000>; -+ opp-microvolt = <900000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x0d>; -+ }; -+ -+ opp-1008000000 { -+ opp-hz = /bits/ 64 <1008000000>; -+ opp-microvolt-speed0 = <950000>; -+ opp-microvolt-speed1 = <940000>; -+ opp-microvolt-speed2 = <950000>; -+ opp-microvolt-speed3 = <950000>; -+ opp-microvolt-speed4 = <1020000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x1f>; -+ }; -+ -+ opp-1104000000 { -+ opp-hz = /bits/ 64 <1104000000>; -+ opp-microvolt-speed0 = <1000000>; -+ opp-microvolt-speed2 = <1000000>; -+ opp-microvolt-speed3 = <1000000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x0d>; -+ }; -+ -+ opp-1200000000 { -+ opp-hz = /bits/ 64 <1200000000>; -+ opp-microvolt-speed0 = <1050000>; -+ opp-microvolt-speed1 = <1020000>; -+ opp-microvolt-speed2 = <1050000>; -+ opp-microvolt-speed3 = <1050000>; -+ opp-microvolt-speed4 = <1100000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x1f>; -+ }; -+ -+ opp-1320000000 { -+ opp-hz = /bits/ 64 <1320000000>; -+ opp-microvolt = <1100000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x1d>; -+ }; -+ -+ opp-1416000000 { -+ opp-hz = /bits/ 64 <1416000000>; -+ opp-microvolt = <1100000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x0d>; -+ }; -+ -+ opp-1512000000 { -+ opp-hz = /bits/ 64 <1512000000>; -+ opp-microvolt-speed1 = <1100000>; -+ opp-microvolt-speed3 = <1100000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-supported-hw = <0x0a>; -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -@@ -26,6 +26,7 @@ - reg = <0>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; -+ #cooling-cells = <2>; - }; - - cpu1: cpu@1 { -@@ -34,6 +35,7 @@ - reg = <1>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; -+ #cooling-cells = <2>; - }; - - cpu2: cpu@2 { -@@ -42,6 +44,7 @@ - reg = <2>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; -+ #cooling-cells = <2>; - }; - - cpu3: cpu@3 { -@@ -50,6 +53,7 @@ - reg = <3>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; -+ #cooling-cells = <2>; - }; - }; - -@@ -143,6 +147,10 @@ - ths_calibration: thermal-sensor-calibration@14 { - reg = <0x14 0x8>; - }; -+ -+ cpu_speed_grade: cpu-speed-grade@0 { -+ reg = <0x0 2>; -+ }; - }; - - watchdog: watchdog@30090a0 { diff --git a/target/linux/sunxi/patches-6.6/023-v6.10-arm64-dts-allwinner-h616-enable-DVFS-for-all-boards.patch b/target/linux/sunxi/patches-6.6/023-v6.10-arm64-dts-allwinner-h616-enable-DVFS-for-all-boards.patch deleted file mode 100644 index 8c91184117c..00000000000 --- a/target/linux/sunxi/patches-6.6/023-v6.10-arm64-dts-allwinner-h616-enable-DVFS-for-all-boards.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 09d0aaa0ae9c80ff9569393b206226c1008801b1 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Thu, 18 Apr 2024 16:44:08 +0100 -Subject: [PATCH] arm64: dts: allwinner: h616: enable DVFS for all boards - -With the DT bindings now describing the format of the CPU OPP tables, we -can include the OPP table in each board's .dts file, and specify the CPU -power supply. -This allows to enable DVFS, and get up to 50% of performance benefit in -the highest OPP, or up to 60% power savings in the lowest OPP, compared -to the fixed 1GHz @ 1.0V OPP we are running in by default at the moment. - -Signed-off-by: Andre Przywara -Acked-by: Jernej Skrabec -Signed-off-by: Viresh Kumar ---- - .../boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi | 5 +++++ - arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 5 +++++ - arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts | 5 +++++ - .../boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi | 5 +++++ - .../arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts | 5 +++++ - arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 5 +++++ - .../boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts | 5 +++++ - 7 files changed, 35 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -@@ -6,12 +6,17 @@ - /dts-v1/; - - #include "sun50i-h616-orangepi-zero.dtsi" -+#include "sun50i-h616-cpu-opp.dtsi" - - / { - model = "OrangePi Zero2"; - compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ - &emac0 { - allwinner,rx-delay-ps = <3100>; - allwinner,tx-delay-ps = <700>; ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts -@@ -6,6 +6,7 @@ - /dts-v1/; - - #include "sun50i-h616.dtsi" -+#include "sun50i-h616-cpu-opp.dtsi" - - #include - #include -@@ -32,6 +33,10 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ - &ehci0 { - status = "okay"; - }; ---- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -@@ -6,12 +6,17 @@ - /dts-v1/; - - #include "sun50i-h616-orangepi-zero.dtsi" -+#include "sun50i-h616-cpu-opp.dtsi" - - / { - model = "OrangePi Zero3"; - compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdc2>; -+}; -+ - &emac0 { - allwinner,tx-delay-ps = <700>; - phy-mode = "rgmii-rxid"; diff --git a/target/linux/sunxi/patches-6.6/024-v6.10-cpufreq-sun50i-Fix-build-warning-around-snprint.patch b/target/linux/sunxi/patches-6.6/024-v6.10-cpufreq-sun50i-Fix-build-warning-around-snprint.patch deleted file mode 100644 index 8bfd6c2d091..00000000000 --- a/target/linux/sunxi/patches-6.6/024-v6.10-cpufreq-sun50i-Fix-build-warning-around-snprint.patch +++ /dev/null @@ -1,51 +0,0 @@ -From d2059d3b548409905b20b4f52495bffbd7c8da8b Mon Sep 17 00:00:00 2001 -From: Viresh Kumar -Date: Mon, 22 Apr 2024 08:58:51 +0530 -Subject: [PATCH] cpufreq: sun50i: Fix build warning around snprint() - -The Sun50i driver generates a warning with W=1: - -warning: '%d' directive output may be truncated writing between 1 and 10 bytes into a region of size 2 [-Wformat-truncation=] - -Fix it by allocating a big enough array to print an integer. - -Reported-by: kernel test robot -Closes: https://lore.kernel.org/oe-kbuild-all/202404191715.LDwMm2gP-lkp@intel.com/ -Signed-off-by: Viresh Kumar -Acked-by: Chen-Yu Tsai -Reviewed-by: Andre Przywara -Tested-by: Andre Przywara -Reviewed-by: Julian Calaby ---- - drivers/cpufreq/sun50i-cpufreq-nvmem.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - ---- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c -+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c -@@ -19,8 +19,6 @@ - #include - #include - --#define MAX_NAME_LEN 7 -- - #define NVMEM_MASK 0x7 - #define NVMEM_SHIFT 5 - -@@ -208,7 +206,7 @@ static int sun50i_cpufreq_get_efuse(void - static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) - { - int *opp_tokens; -- char name[MAX_NAME_LEN]; -+ char name[] = "speedXXXXXXXXXXX"; /* Integers can take 11 chars max */ - unsigned int cpu, supported_hw; - struct dev_pm_opp_config config = {}; - int speed; -@@ -235,7 +233,7 @@ static int sun50i_cpufreq_nvmem_probe(st - config.supported_hw_count = 1; - } - -- snprintf(name, MAX_NAME_LEN, "speed%d", speed); -+ snprintf(name, sizeof(name), "speed%d", speed); - config.prop_name = name; - - for_each_possible_cpu(cpu) { diff --git a/target/linux/sunxi/patches-6.6/025-v6.10-cpufreq-sun50i-fix-error-returns-in-dt_has_supported_hw.patch b/target/linux/sunxi/patches-6.6/025-v6.10-cpufreq-sun50i-fix-error-returns-in-dt_has_supported_hw.patch deleted file mode 100644 index 2304a6af79c..00000000000 --- a/target/linux/sunxi/patches-6.6/025-v6.10-cpufreq-sun50i-fix-error-returns-in-dt_has_supported_hw.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 76a6fc5644b2a1c70868bec24a078f784600ef2a Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Wed, 24 Apr 2024 14:40:11 +0300 -Subject: [PATCH] cpufreq: sun50i: fix error returns in dt_has_supported_hw() - -The dt_has_supported_hw() function returns type bool. That means these -negative error codes are cast to true but the function should return -false instead. - -Fixes: fa5aec9561cf ("cpufreq: sun50i: Add support for opp_supported_hw") -Signed-off-by: Dan Carpenter -Reviewed-by: Andre Przywara -Reviewed-by: Jernej Skrabec -Signed-off-by: Viresh Kumar ---- - drivers/cpufreq/sun50i-cpufreq-nvmem.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c -+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c -@@ -136,11 +136,11 @@ static bool dt_has_supported_hw(void) - - cpu_dev = get_cpu_device(0); - if (!cpu_dev) -- return -ENODEV; -+ return false; - - np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); - if (!np) -- return -ENOENT; -+ return false; - - for_each_child_of_node(np, opp) { - if (of_find_property(opp, "opp-supported-hw", NULL)) { diff --git a/target/linux/sunxi/patches-6.6/102-sunxi-add-OF-node-for-USB-eth-on-NanoPi-R1S-H5.patch b/target/linux/sunxi/patches-6.6/102-sunxi-add-OF-node-for-USB-eth-on-NanoPi-R1S-H5.patch deleted file mode 100644 index 30c98aa7378..00000000000 --- a/target/linux/sunxi/patches-6.6/102-sunxi-add-OF-node-for-USB-eth-on-NanoPi-R1S-H5.patch +++ /dev/null @@ -1,30 +0,0 @@ -From a896bc1d79e3c00f0aacfe225499d811775616f3 Mon Sep 17 00:00:00 2001 -From: Chukun Pan -Date: Sun, 10 Oct 2021 21:50:17 +0800 -Subject: [PATCH] arm64: allwinner: add OF node for USB eth on NanoPi R1S H5 - -This adds the OF node for the USB3 ethernet adapter on the FriendlyARM -NanoPi R1S H5. Add the correct value for the RTL8153 LED configuration -register to match the blink behavior of the other port on the device. - -Signed-off-by: Chukun Pan ---- - arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts -@@ -116,6 +116,13 @@ - - &ehci1 { - status = "okay"; -+ -+ usb-eth@1 { -+ compatible = "realtek,rtl8153"; -+ reg = <1>; -+ -+ realtek,led-data = <0x78>; -+ }; - }; - - &ehci2 { diff --git a/target/linux/sunxi/patches-6.6/301-orangepi_pc2_usb_otg_to_host_key_power.patch b/target/linux/sunxi/patches-6.6/301-orangepi_pc2_usb_otg_to_host_key_power.patch deleted file mode 100644 index eea47737fa5..00000000000 --- a/target/linux/sunxi/patches-6.6/301-orangepi_pc2_usb_otg_to_host_key_power.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -@@ -60,7 +60,7 @@ - - key-sw4 { - label = "sw4"; -- linux,code = ; -+ linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; - wakeup-source; - }; -@@ -221,7 +221,7 @@ - }; - - &usb_otg { -- dr_mode = "otg"; -+ dr_mode = "host"; - status = "okay"; - }; - diff --git a/target/linux/sunxi/patches-6.6/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch b/target/linux/sunxi/patches-6.6/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch deleted file mode 100644 index a8dfcd9dbce..00000000000 --- a/target/linux/sunxi/patches-6.6/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 7d87d3dafc4b1ea5659eb71ee6c5fd5308490d1f Mon Sep 17 00:00:00 2001 -From: Oskari Lemmela -Date: Mon, 31 Dec 2018 07:44:49 +0200 -Subject: [PATCH] arm64: allwinner: a64-sopine: Add Sopine flash partitions. - -First 896kB to u-boot. Enough space for SPL, u-boot and ATF. -Next 128kB to u-boot environment and rest to firmware. - -Firmware partition is compatible FIT image dynamic splitting. - -Signed-off-by: Oskari Lemmela ---- - .../boot/dts/allwinner/sun50i-a64-sopine.dtsi | 22 +++++++++++++++++++ - 1 file changed, 22 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -@@ -58,6 +58,28 @@ - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <40000000>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "u-boot"; -+ reg = <0x000000 0x0E0000>; -+ }; -+ -+ partition@e0000 { -+ label = "u-boot-env"; -+ reg = <0x0E0000 0x020000>; -+ }; -+ -+ partition@100000 { -+ compatible = "denx,fit"; -+ label = "firmware"; -+ reg = <0x100000 0xF00000>; -+ }; -+ }; - }; - }; - diff --git a/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch b/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch deleted file mode 100644 index f605292dcd8..00000000000 --- a/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch +++ /dev/null @@ -1,292 +0,0 @@ ---- a/arch/arm/boot/dts/allwinner/Makefile -+++ b/arch/arm/boot/dts/allwinner/Makefile -@@ -219,6 +219,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ - sun8i-a83t-cubietruck-plus.dtb \ - sun8i-a83t-tbs-a711.dtb \ - sun8i-h2-plus-bananapi-m2-zero.dtb \ -+ sun8i-h2-plus-bananapi-p2-zero.dtb \ - sun8i-h2-plus-libretech-all-h3-cc.dtb \ - sun8i-h2-plus-orangepi-r1.dtb \ - sun8i-h2-plus-orangepi-zero.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-p2-zero.dts -@@ -0,0 +1,279 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (C) 2023 Zoltan HERPAI -+ * -+ * Based on sun8i-h2-plus-bananapi-m2-zero.dts, which is: -+ * Copyright (C) 2017 Icenowy Zheng -+ */ -+ -+/dts-v1/; -+#include "sun8i-h3.dtsi" -+#include "sunxi-common-regulators.dtsi" -+ -+#include -+#include -+ -+/ { -+ model = "Banana Pi BPI-P2-Zero"; -+ compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus"; -+ -+ aliases { -+ serial0 = &uart0; -+ serial1 = &uart1; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ connector { -+ compatible = "hdmi-connector"; -+ type = "c"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ pwr_led { -+ label = "bananapi-p2-zero:red:pwr"; -+ gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */ -+ default-state = "on"; -+ }; -+ }; -+ -+ gpio_keys { -+ compatible = "gpio-keys"; -+ -+ sw4 { -+ label = "power"; -+ linux,code = ; -+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ reg_vdd_cpux: vdd-cpux-regulator { -+ compatible = "regulator-gpio"; -+ regulator-name = "vdd-cpux"; -+ regulator-type = "voltage"; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1300000>; -+ regulator-ramp-delay = <50>; /* 4ms */ -+ -+ gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */ -+ enable-active-high; -+ gpios-states = <0x1>; -+ states = <1100000 0>, <1300000 1>; -+ }; -+ -+ reg_vcc_dram: vcc-dram { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-dram"; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-always-on; -+ regulator-boot-on; -+ enable-active-high; -+ gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ -+ vin-supply = <®_vcc5v0>; -+ }; -+ -+ reg_vcc1v2: vcc1v2 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc1v2"; -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-always-on; -+ regulator-boot-on; -+ enable-active-high; -+ gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ vin-supply = <®_vcc5v0>; -+ }; -+ -+ poweroff { -+ compatible = "regulator-poweroff"; -+ cpu-supply = <®_vcc1v2>; -+ }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ -+ clocks = <&rtc 1>; -+ clock-names = "ext_clock"; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpux>; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ -+&mmc0 { -+ vmmc-supply = <®_vcc3v3>; -+ bus-width = <4>; -+ /* -+ * On the production batch of this board the card detect GPIO is -+ * high active (card inserted), although on the early samples it's -+ * low active. -+ */ -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ -+ status = "okay"; -+}; -+ -+&mmc1 { -+ vmmc-supply = <®_vcc3v3>; -+ vqmmc-supply = <®_vcc3v3>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&pio>; -+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pa_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ max-speed = <1500000>; -+ clocks = <&rtc 1>; -+ clock-names = "lpo"; -+ vbat-supply = <®_vcc3v3>; -+ vddio-supply = <®_vcc3v3>; -+ device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ -+ host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */ -+ shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ -+ }; -+ -+}; -+ -+&pio { -+ gpio-line-names = -+ /* PA */ -+ "CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15", -+ "CON3-P03", "CON3-P02", "CON2-P07", "CON2-P29", -+ "CON2-P31", "CON2-P33", "CON2-P35", "CON2-P05", -+ "CON2-P03", "CON2-P08", "CON2-P10", "CON2-P16", -+ "CON2-P12", "CON2-P37", "CON2-P28", "CON2-P27", -+ "CON2-P40", "CON2-P38", "", "", -+ "", "", "", "", "", "", "", "", -+ -+ /* PB */ -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ -+ /* PC */ -+ "CON2-P19", "CON2-P21", "CON2-P23", "CON2-P24", -+ "CON2-P18", "", "", "CON2-P26", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ -+ /* PD */ -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "CSI-PWR-EN", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ -+ /* PE */ -+ "CN3-P17", "CN3-P13", "CN3-P09", "CN3-P07", -+ "CN3-P19", "CN3-P21", "CN3-P22", "CN3-P20", -+ "CN3-P18", "CN3-P16", "CN3-P14", "CN3-P12", -+ "CN3-P05", "CN3-P03", "CN3-P06", "CN3-P08", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ -+ /* PF */ -+ "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3", -+ "SDC0-D2", "SDC0-DET", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ -+ /* PG */ -+ "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1", -+ "WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX", -+ "BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP", -+ "BT-RST-N", "AP-WAKE-BT", "", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", ""; -+}; -+ -+&r_pio { -+ gpio-line-names = -+ /* PL */ -+ "", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36", -+ "VCC-IO-EN", "USB0-ID", "WL-PWR-EN", -+ "PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "", -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", "", ""; -+}; -+ -+&usb_otg { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usbphy { -+ usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ -+ /* -+ * There're two micro-USB connectors, one is power-only and another is -+ * OTG. The Vbus of these two connectors are connected together, so -+ * the external USB device will be powered just by the power input -+ * from the power-only USB port. -+ */ -+ status = "okay"; -+}; diff --git a/target/linux/sunxi/patches-6.6/430-arm64-dts-allwinner-a64-olinuxino-add-status-LED-ali.patch b/target/linux/sunxi/patches-6.6/430-arm64-dts-allwinner-a64-olinuxino-add-status-LED-ali.patch deleted file mode 100644 index 68ec333e374..00000000000 --- a/target/linux/sunxi/patches-6.6/430-arm64-dts-allwinner-a64-olinuxino-add-status-LED-ali.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Thu, 26 Mar 2020 10:09:19 +0100 -Subject: [PATCH] arm64: dts: allwinner: a64: olinuxino: add status LED aliases -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Petr Å tetiar - ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts -@@ -15,6 +15,10 @@ - aliases { - ethernet0 = &emac; - serial0 = &uart0; -+ led-boot = &led_user; -+ led-failsafe = &led_user; -+ led-running = &led_user; -+ led-upgrade = &led_user; - }; - - chosen { -@@ -35,7 +39,7 @@ - leds { - compatible = "gpio-leds"; - -- led-0 { -+ led_user: led-0 { - label = "a64-olinuxino:red:user"; - gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ - }; diff --git a/target/linux/sunxi/patches-6.6/431-arm64-dts-allwinner-nanopi-r1s-h5-add-status-LED.patch b/target/linux/sunxi/patches-6.6/431-arm64-dts-allwinner-nanopi-r1s-h5-add-status-LED.patch deleted file mode 100644 index 8670d06109b..00000000000 --- a/target/linux/sunxi/patches-6.6/431-arm64-dts-allwinner-nanopi-r1s-h5-add-status-LED.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 1845163a052efac124f00656eb72f38947630a42 Mon Sep 17 00:00:00 2001 -From: Chukun Pan -Date: Sun, 10 Oct 2021 21:50:18 +0800 -Subject: [PATCH] arm64: dts: allwinner: NanoPi R1S H5: add status LED aliases - -Use the SYS LED on the casing for showing system status. - -Signed-off-by: Chukun Pan ---- - arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts -@@ -23,6 +23,11 @@ - ethernet0 = &emac; - ethernet1 = &rtl8189etv; - serial0 = &uart0; -+ -+ led-boot = &led_sys; -+ led-failsafe = &led_sys; -+ led-running = &led_sys; -+ led-upgrade = &led_sys; - }; - - chosen { -@@ -38,7 +43,7 @@ - gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; - }; - -- led-1 { -+ led_sys: led-1 { - function = LED_FUNCTION_STATUS; - color = ; - gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; diff --git a/target/linux/sunxi/patches-6.6/442-arm64-dts-orangepi-one-plus-enable-PWM.patch b/target/linux/sunxi/patches-6.6/442-arm64-dts-orangepi-one-plus-enable-PWM.patch deleted file mode 100644 index 76a73ee1f0d..00000000000 --- a/target/linux/sunxi/patches-6.6/442-arm64-dts-orangepi-one-plus-enable-PWM.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts -@@ -41,3 +41,7 @@ - reg = <1>; - }; - }; -+ -+&pwm { -+ status = "okay"; -+}; diff --git a/target/linux/sunxi/patches-6.6/450-arm64-dts-enable-wifi-on-pine64-boards.patch b/target/linux/sunxi/patches-6.6/450-arm64-dts-enable-wifi-on-pine64-boards.patch deleted file mode 100644 index 3876852c2bc..00000000000 --- a/target/linux/sunxi/patches-6.6/450-arm64-dts-enable-wifi-on-pine64-boards.patch +++ /dev/null @@ -1,72 +0,0 @@ ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts -@@ -42,6 +42,11 @@ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ -+ }; - }; - - &ac_power_supply { -@@ -102,6 +107,21 @@ - reg = <1>; - }; - }; -+ -+&mmc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc1_pins>; -+ vmmc-supply = <®_dldo4>; -+ vqmmc-supply = <®_eldo1>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ rtl8723cs: wifi@1 { -+ reg = <1>; -+ }; -+}; - - &mmc2 { - pinctrl-names = "default"; ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -35,6 +35,11 @@ - }; - }; - }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ -+ }; - }; - - &codec { -@@ -124,6 +129,21 @@ - status = "okay"; - }; - -+&mmc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc1_pins>; -+ vmmc-supply = <®_dldo4>; -+ vqmmc-supply = <®_eldo1>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ rtl8723cs: wifi@1 { -+ reg = <1>; -+ }; -+}; -+ - &ohci0 { - status = "okay"; - }; diff --git a/target/linux/sunxi/patches-6.6/451-sunxi-add-csi-video-support-for-nanopi-neo-air.patch b/target/linux/sunxi/patches-6.6/451-sunxi-add-csi-video-support-for-nanopi-neo-air.patch deleted file mode 100644 index c17d28c691d..00000000000 --- a/target/linux/sunxi/patches-6.6/451-sunxi-add-csi-video-support-for-nanopi-neo-air.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 4c3a3af679bd59660ac80889b560bddaf475ba81 Mon Sep 17 00:00:00 2001 -From: Michel Promonet -Date: Sun, 21 Jul 2024 19:04:19 +0200 -Subject: [PATCH] sunxi: add csi video support for nanopi-neo-air - ---- - .../dts/allwinner/sun8i-h3-nanopi-neo-air.dts | 85 +++++++++++++++++++ - 1 file changed, 85 insertions(+) - ---- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts -+++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts -@@ -77,6 +77,39 @@ - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - }; -+ -+ cam_xclk: cam-xclk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <24000000>; -+ clock-output-names = "cam-xclk"; -+ }; -+ -+ reg_cam_avdd: cam-avdd { -+ compatible = "regulator-fixed"; -+ regulator-name = "cam-avdd"; -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ vin-supply = <®_vcc3v3>; -+ }; -+ -+ reg_cam_dovdd: cam-dovdd { -+ compatible = "regulator-fixed"; -+ regulator-name = "cam-dovdd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <®_vcc3v3>; -+ }; -+ -+ reg_cam_dvdd: cam-dvdd { -+ compatible = "regulator-fixed"; -+ regulator-name = "cam-dvdd"; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ vin-supply = <®_vcc3v3>; -+ }; -+ -+ - }; - - &mmc0 { -@@ -141,3 +174,55 @@ - /* USB VBUS is always on */ - status = "okay"; - }; -+ -+&csi { -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* Parallel bus endpoint */ -+ csi_from_ov5640: endpoint { -+ remote-endpoint = <&ov5640_to_csi>; -+ bus-width = <8>; -+ data-shift = <2>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ }; -+}; -+ -+&i2c2 { -+ status = "okay"; -+ -+ ov5640: camera@3c { -+ compatible = "ovti,ov5640"; -+ reg = <0x3c>; -+ clocks = <&cam_xclk>; -+ clock-names = "xclk"; -+ -+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; -+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; -+ AVDD-supply = <®_cam_avdd>; -+ DOVDD-supply = <®_cam_dovdd>; -+ DVDD-supply = <®_cam_dvdd>; -+ -+ port { -+ ov5640_to_csi: endpoint { -+ remote-endpoint = <&csi_from_ov5640>; -+ bus-width = <8>; -+ data-shift = <2>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ }; -+ }; -+}; -+&i2c2_pins { -+ bias-pull-up; -+};