From: Claudiu Zissulescu <claziss@synopsys.com>
Date: Fri, 4 Jun 2021 07:12:32 +0000 (+0300)
Subject: arc: Don't allow millicode thunks with reduced register set CPUs.
X-Git-Tag: basepoints/gcc-13~7110
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=39e5a954c156f7af16aa1a8f87405433d8031c4e;p=thirdparty%2Fgcc.git

arc: Don't allow millicode thunks with reduced register set CPUs.

The millicode thunks are not reduced register set safe.  Disable them
for CPUs having this option on.

gcc/
2021-06-04  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_override_options): Disable millicode
	thunks when RF16 is on.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
---

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index b77d0566386f..0d34c9649638 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -1451,8 +1451,10 @@ arc_override_options (void)
   if (TARGET_ARC700 && (arc_tune != ARC_TUNE_ARC7XX))
     flag_delayed_branch = 0;
 
-  /* Millicode thunks doesn't work with long calls.  */
-  if (TARGET_LONG_CALLS_SET)
+  /* Millicode thunks doesn't work for long calls.  */
+  if (TARGET_LONG_CALLS_SET
+      /* neither for RF16.  */
+      || TARGET_RF16)
     target_flags &= ~MASK_MILLICODE_THUNK_SET;
 
   /* Set unaligned to all HS cpus.  */