From: Richard Biener Date: Tue, 27 Apr 2021 07:41:38 +0000 (+0200) Subject: tree-optimization/100278 - handle mismatched code in TBAA adjust of PRE X-Git-Tag: releases/gcc-11.2.0~450 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3ac56ea477ec72340ebbce44af93c7712b579109;p=thirdparty%2Fgcc.git tree-optimization/100278 - handle mismatched code in TBAA adjust of PRE PRE has code to adjust TBAA behavior for refs that expects the base operation code to match. The testcase shows a case where we have a VAR_DECL vs. a MEM_REF so add code to give up in such cases. 2021-04-27 Richard Biener PR tree-optimization/100278 * tree-ssa-pre.c (compute_avail): Give up when we cannot adjust TBAA beacuse of mismatching bases. * gcc.dg/tree-ssa/pr100278.c: New testcase. (cherry picked from commit acfe5290406cc70485df8899d14982278a9371f8) --- diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c b/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c new file mode 100644 index 000000000000..8d702284c3ae --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void a() +{ +#if defined __s390__ + register int b asm("r5"); +#elif defined __x86_64__ + register int b asm("eax"); +#else + volatile int b; +#endif + if (b) + b = 1; + for (; b;) + ; +} diff --git a/gcc/tree-ssa-pre.c b/gcc/tree-ssa-pre.c index 91dd49200c30..5a710db9795c 100644 --- a/gcc/tree-ssa-pre.c +++ b/gcc/tree-ssa-pre.c @@ -4152,6 +4152,16 @@ compute_avail (void) if (ref->set == set || alias_set_subset_of (set, ref->set)) ; + else if (ref1->opcode != ref2->opcode + || (ref1->opcode != MEM_REF + && ref1->opcode != TARGET_MEM_REF)) + { + /* With mismatching base opcodes or bases + other than MEM_REF or TARGET_MEM_REF we + can't do any easy TBAA adjustment. */ + operands.release (); + continue; + } else if (alias_set_subset_of (ref->set, set)) { ref->set = set;