From: Catalin Marinas Date: Thu, 24 Jul 2025 15:01:22 +0000 (+0100) Subject: Merge branches 'for-next/livepatch', 'for-next/user-contig-bbml2', 'for-next/misc... X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3ae8cef210dd52ae95fd5a87f9bea0932bd4e470;p=thirdparty%2Flinux.git Merge branches 'for-next/livepatch', 'for-next/user-contig-bbml2', 'for-next/misc', 'for-next/acpi', 'for-next/debug-entry', 'for-next/feat_mte_tagged_far', 'for-next/kselftest', 'for-next/mdscr-cleanup' and 'for-next/vmap-stack', remote-tracking branch 'arm64/for-next/perf' into for-next/core * arm64/for-next/perf: (23 commits) drivers/perf: hisi: Support PMUs with no interrupt drivers/perf: hisi: Relax the event number check of v2 PMUs drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU information drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver drivers/perf: hisi: Simplify the probe process for each DDRC version perf/arm-ni: Support sharing IRQs within an NI instance perf/arm-ni: Consolidate CPU affinity handling perf/cxlpmu: Fix typos in cxl_pmu.c comments and documentation perf/cxlpmu: Remove unintended newline from IRQ name format string perf/cxlpmu: Fix devm_kcalloc() argument order in cxl_pmu_probe() perf: arm_spe: Relax period restriction perf: arm_pmuv3: Add support for the Branch Record Buffer Extension (BRBE) KVM: arm64: nvhe: Disable branch generation in nVHE guests arm64: Handle BRBE booting requirements arm64/sysreg: Add BRBE registers and fields perf/arm: Add missing .suppress_bind_attrs perf/arm-cmn: Reduce stack usage during discovery perf: imx9_perf: make the read-only array mask static const perf/arm-cmn: Broaden module description for wider interconnect support ... * for-next/livepatch: : Support for HAVE_LIVEPATCH on arm64 arm64: Kconfig: Keep selects somewhat alphabetically ordered arm64: Implement HAVE_LIVEPATCH arm64: stacktrace: Implement arch_stack_walk_reliable() arm64: stacktrace: Check kretprobe_find_ret_addr() return value arm64/module: Use text-poke API for late relocations. * for-next/user-contig-bbml2: : Optimise the TLBI when folding/unfolding contigous PTEs on hardware with BBML2 and no TLB conflict aborts arm64/mm: Elide tlbi in contpte_convert() under BBML2 iommu/arm: Add BBM Level 2 smmu feature arm64: Add BBM Level 2 cpu feature arm64: cpufeature: Introduce MATCH_ALL_EARLY_CPUS capability type * for-next/misc: : Miscellaneous arm64 patches arm64/gcs: task_gcs_el0_enable() should use passed task arm64: signal: Remove ISB when resetting POR_EL0 arm64/mm: Drop redundant addr increment in set_huge_pte_at() arm64: Mark kernel as tainted on SAE and SError panic arm64/gcs: Don't call gcs_free() when releasing task_struct arm64: fix unnecessary rebuilding when CONFIG_DEBUG_EFI=y arm64/mm: Optimize loop to reduce redundant operations of contpte_ptep_get arm64: pi: use 'targets' instead of extra-y in Makefile * for-next/acpi: : Various ACPI arm64 changes ACPI: Suppress misleading SPCR console message when SPCR table is absent ACPI: Return -ENODEV from acpi_parse_spcr() when SPCR support is disabled * for-next/debug-entry: : Simplify the debug exception entry path arm64: debug: remove debug exception registration infrastructure arm64: debug: split bkpt32 exception entry arm64: debug: split brk64 exception entry arm64: debug: split hardware watchpoint exception entry arm64: debug: split single stepping exception entry arm64: debug: refactor reinstall_suspended_bps() arm64: debug: split hardware breakpoint exception entry arm64: entry: Add entry and exit functions for debug exceptions arm64: debug: remove break/step handler registration infrastructure arm64: debug: call step handlers statically arm64: debug: call software breakpoint handlers statically arm64: refactor aarch32_break_handler() arm64: debug: clean up single_step_handler logic * for-next/feat_mte_tagged_far: : Support for reporting the non-address bits during a synchronous MTE tag check fault kselftest/arm64/mte: Add mtefar tests on check_mmap_options kselftest/arm64/mte: Refactor check_mmap_option test kselftest/arm64/mte: Add verification for address tag in signal handler kselftest/arm64/mte: Add address tag related macro and function kselftest/arm64/mte: Check MTE_FAR feature is supported kselftest/arm64/mte: Register mte signal handler with SA_EXPOSE_TAGBITS kselftest/arm64: Add MTE_FAR hwcap test KVM: arm64: Expose FEAT_MTE_TAGGED_FAR feature to guest arm64: Report address tag when FEAT_MTE_TAGGED_FAR is supported arm64/cpufeature: Add FEAT_MTE_TAGGED_FAR feature * for-next/kselftest: : Kselftest updates for arm64 kselftest/arm64: Handle attempts to disable SM on SME only systems kselftest/arm64: Fix SVE write data generation for SME only systems kselftest/arm64: Test SME on SME only systems in fp-ptrace kselftest/arm64: Test FPSIMD format data writes via NT_ARM_SVE in fp-ptrace kselftest/arm64: Allow sve-ptrace to run on SME only systems kselftest/arm4: Provide local defines for AT_HWCAP3 kselftest/arm64: Specify SVE data when testing VL set in sve-ptrace kselftest/arm64: Fix test for streaming FPSIMD write in sve-ptrace kselftest/arm64: Fix check for setting new VLs in sve-ptrace kselftest/arm64: Convert tpidr2 test to use kselftest.h * for-next/mdscr-cleanup: : Drop redundant DBG_MDSCR_* macros KVM: selftests: Change MDSCR_EL1 register holding variables as uint64_t arm64/debug: Drop redundant DBG_MDSCR_* macros * for-next/vmap-stack: : Force VMAP_STACK on arm64 arm64: remove CONFIG_VMAP_STACK checks from entry code arm64: remove CONFIG_VMAP_STACK checks from SDEI stack handling arm64: remove CONFIG_VMAP_STACK checks from stacktrace overflow logic arm64: remove CONFIG_VMAP_STACK conditionals from traps overflow stack arm64: remove CONFIG_VMAP_STACK conditionals from irq stack setup arm64: Remove CONFIG_VMAP_STACK conditionals from THREAD_SHIFT and THREAD_ALIGN arm64: efi: Remove CONFIG_VMAP_STACK check arm64: Mandate VMAP_STACK arm64: efi: Fix KASAN false positive for EFI runtime stack arm64/ptrace: Fix stack-out-of-bounds read in regs_get_kernel_stack_nth() arm64/gcs: Don't call gcs_free() during flush_gcs() arm64: Restrict pagetable teardown to avoid false warning docs: arm64: Fix ICC_SRE_EL2 register typo in booting.rst --- 3ae8cef210dd52ae95fd5a87f9bea0932bd4e470 diff --cc arch/arm64/kernel/entry-common.c index 7c1970b341b8c,a56878d7c7335,7c1970b341b8c,7c1970b341b8c,7c1970b341b8c,4b67312a88ad6,7c1970b341b8c,7c1970b341b8c,171f93f2494b4,99a341ee71313..2b0c5925502e7 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@@@@@@@@@@ -504,8 -508,8 -504,8 -504,8 -504,8 -526,36 -504,8 -504,8 -504,8 -504,8 +530,36 @@@@@@@@@@@ static void noinstr el1_mops(struct pt_ exit_to_kernel_mode(regs); } ----- ----static void noinstr el1_dbg(struct pt_regs *regs, unsigned long esr) +++++ ++++static void noinstr el1_breakpt(struct pt_regs *regs, unsigned long esr) +++++ ++++{ +++++ ++++ arm64_enter_el1_dbg(regs); +++++ ++++ debug_exception_enter(regs); +++++ ++++ do_breakpoint(esr, regs); +++++ ++++ debug_exception_exit(regs); +++++ ++++ arm64_exit_el1_dbg(regs); +++++ ++++} +++++ ++++ +++++ ++++static void noinstr el1_softstp(struct pt_regs *regs, unsigned long esr) + { +++++ ++++ arm64_enter_el1_dbg(regs); +++++ ++++ if (!cortex_a76_erratum_1463225_debug_handler(regs)) { +++++ ++++ debug_exception_enter(regs); +++++ ++++ /* +++++ ++++ * After handling a breakpoint, we suspend the breakpoint +++++ ++++ * and use single-step to move to the next instruction. +++++ ++++ * If we are stepping a suspended breakpoint there's nothing more to do: +++++ ++++ * the single-step is complete. +++++ ++++ */ +++++ ++++ if (!try_step_suspended_breakpoints(regs)) +++++ ++++ do_el1_softstep(esr, regs); +++++ ++++ debug_exception_exit(regs); +++++ ++++ } +++++ ++++ arm64_exit_el1_dbg(regs); +++++ ++++} +++++ ++++ +++++ ++++static void noinstr el1_watchpt(struct pt_regs *regs, unsigned long esr) + +++ ++++{ +++++ ++++ /* Watchpoints are the only debug exception to write FAR_EL1 */ unsigned long far = read_sysreg(far_el1); arm64_enter_el1_dbg(regs); @@@@@@@@@@@ -747,9 -751,9 -747,9 -747,9 -747,9 -813,41 -747,9 -747,9 -747,9 -747,9 +817,41 @@@@@@@@@@@ static void noinstr el0_inv(struct pt_r exit_to_user_mode(regs); } ----- ----static void noinstr el0_dbg(struct pt_regs *regs, unsigned long esr) +++++ ++++static void noinstr el0_breakpt(struct pt_regs *regs, unsigned long esr) + { - --- ---- /* Only watchpoints write FAR_EL1, otherwise its UNKNOWN */ +++++ ++++ if (!is_ttbr0_addr(regs->pc)) +++++ ++++ arm64_apply_bp_hardening(); +++++ ++++ +++++ ++++ enter_from_user_mode(regs); +++++ ++++ debug_exception_enter(regs); +++++ ++++ do_breakpoint(esr, regs); +++++ ++++ debug_exception_exit(regs); +++++ ++++ local_daif_restore(DAIF_PROCCTX); +++++ ++++ exit_to_user_mode(regs); +++++ ++++} +++++ ++++ +++++ ++++static void noinstr el0_softstp(struct pt_regs *regs, unsigned long esr) +++++ ++++{ +++++ ++++ if (!is_ttbr0_addr(regs->pc)) +++++ ++++ arm64_apply_bp_hardening(); +++++ ++++ +++++ ++++ enter_from_user_mode(regs); +++++ ++++ /* +++++ ++++ * After handling a breakpoint, we suspend the breakpoint +++++ ++++ * and use single-step to move to the next instruction. +++++ ++++ * If we are stepping a suspended breakpoint there's nothing more to do: +++++ ++++ * the single-step is complete. +++++ ++++ */ +++++ ++++ if (!try_step_suspended_breakpoints(regs)) { +++++ ++++ local_daif_restore(DAIF_PROCCTX); +++++ ++++ do_el0_softstep(esr, regs); +++++ ++++ } +++++ ++++ exit_to_user_mode(regs); +++++ ++++} +++++ ++++ +++++ ++++static void noinstr el0_watchpt(struct pt_regs *regs, unsigned long esr) + +++ ++++{ - /* Only watchpoints write FAR_EL1, otherwise its UNKNOWN */ +++++ ++++ /* Watchpoints are the only debug exception to write FAR_EL1 */ unsigned long far = read_sysreg(far_el1); enter_from_user_mode(regs); diff --cc arch/arm64/kernel/traps.c index 9bfa5c944379d,9bfa5c944379d,9bfa5c944379d,7468b22585cef,9bfa5c944379d,98b11da5a5ade,9bfa5c944379d,9bfa5c944379d,9bfa5c944379d,6acbcffca6506..f528b6041f6a8 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@@@@@@@@@@ -1121,48 -1121,48 -1121,48 -1122,48 -1121,48 -1099,4 -1121,48 -1121,48 -1121,48 -1118,48 +1097,4 @@@@@@@@@@@ int ubsan_brk_handler(struct pt_regs *r die(report_ubsan_failure(esr & UBSAN_BRK_MASK), regs, esr); return DBG_HOOK_HANDLED; } ----- ---- ----- ----static struct break_hook ubsan_break_hook = { ----- ---- .fn = ubsan_handler, ----- ---- .imm = UBSAN_BRK_IMM, ----- ---- .mask = UBSAN_BRK_MASK, ----- ----}; ----- ----#endif ----- ---- ----- ----/* ----- ---- * Initial handler for AArch64 BRK exceptions ----- ---- * This handler only used until debug_traps_init(). ----- ---- */ ----- ----int __init early_brk64(unsigned long addr, unsigned long esr, ----- ---- struct pt_regs *regs) ----- ----{ ----- ----#ifdef CONFIG_CFI_CLANG ----- ---- if (esr_is_cfi_brk(esr)) ----- ---- return cfi_handler(regs, esr) != DBG_HOOK_HANDLED; ----- ----#endif ----- ----#ifdef CONFIG_KASAN_SW_TAGS ----- ---- if ((esr_brk_comment(esr) & ~KASAN_BRK_MASK) == KASAN_BRK_IMM) ----- ---- return kasan_handler(regs, esr) != DBG_HOOK_HANDLED; ----- ----#endif ----- ----#ifdef CONFIG_UBSAN_TRAP ----- ---- if (esr_is_ubsan_brk(esr)) ----- ---- return ubsan_handler(regs, esr) != DBG_HOOK_HANDLED; ----- ----#endif ----- ---- return bug_handler(regs, esr) != DBG_HOOK_HANDLED; ----- ----} ----- ---- ----- ----void __init trap_init(void) ----- ----{ ----- ---- register_kernel_break_hook(&bug_break_hook); ----- ----#ifdef CONFIG_CFI_CLANG ----- ---- register_kernel_break_hook(&cfi_break_hook); ----- ----#endif ----- ---- register_kernel_break_hook(&fault_break_hook); ----- ----#ifdef CONFIG_KASAN_SW_TAGS ----- ---- register_kernel_break_hook(&kasan_break_hook); ----- --- #endif ----- --- #ifdef CONFIG_UBSAN_TRAP ----- --- register_kernel_break_hook(&ubsan_break_hook); #endif -#ifdef CONFIG_UBSAN_TRAP - register_kernel_break_hook(&ubsan_break_hook); -#endif ----- ---- debug_traps_init(); ----- ----}