From: Niklas Söderlund Date: Tue, 14 Jan 2025 18:30:03 +0000 (+0100) Subject: clk: renesas: r8a779a0: Add ISP core clocks X-Git-Tag: v6.15-rc1~103^2~2^2~1^2~13 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3b0016a613e5256ef3a782286b05c7f549908ad1;p=thirdparty%2Fkernel%2Flinux.git clk: renesas: r8a779a0: Add ISP core clocks Add the ISP core modules clock for Renesas R-Car V3U. Signed-off-by: Niklas Söderlund Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250114183005.2761213-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 4a5b4e2afa92a..1be7b9592aa62 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -138,6 +138,10 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { + DEF_MOD("isp0", 16, R8A779A0_CLK_S1D1), + DEF_MOD("isp1", 17, R8A779A0_CLK_S1D1), + DEF_MOD("isp2", 18, R8A779A0_CLK_S1D1), + DEF_MOD("isp3", 19, R8A779A0_CLK_S1D1), DEF_MOD("avb0", 211, R8A779A0_CLK_S3D2), DEF_MOD("avb1", 212, R8A779A0_CLK_S3D2), DEF_MOD("avb2", 213, R8A779A0_CLK_S3D2),