From: Richard Earnshaw <rearnsha@arm.com>
Date: Sat, 16 May 2009 23:04:06 +0000 (+0000)
Subject: re PR target/40153 (Long long comparison optimized away incorrectly in Thumb code.)
X-Git-Tag: releases/gcc-4.3.4~171
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3bea68c5858f6e62a6e20322e0ec6533bc3a598f;p=thirdparty%2Fgcc.git

re PR target/40153 (Long long comparison optimized away incorrectly in Thumb code.)

	PR target/40153
	* arm.md (cstoresi_nltu_thumb1): Use a neg of ltu as the pattern name
	implies.

From-SVN: r147626
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7e7649778528..d1023425ce3f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2009-05-16  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/40153
+	* arm.md (cstoresi_nltu_thumb1): Use a neg of ltu as the pattern name
+	implies.
+
 2009-05-16  Richard Earnshaw  <rearnsha@arm.com>
 
 	* arm.md (movdi2): Copy non-reg values to DImode registers.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1894cec01dc0..e6ae54393b8b 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8005,7 +8005,7 @@
 
 (define_insn "cstoresi_nltu_thumb1"
   [(set (match_operand:SI 0 "s_register_operand" "=l,l")
-        (neg:SI (gtu:SI (match_operand:SI 1 "s_register_operand" "l,*h")
+        (neg:SI (ltu:SI (match_operand:SI 1 "s_register_operand" "l,*h")
 			(match_operand:SI 2 "thumb1_cmp_operand" "lI*h,*r"))))]
   "TARGET_THUMB1"
   "cmp\\t%1, %2\;sbc\\t%0, %0, %0"