From: Julian Seward <jseward@acm.org>
Date: Mon, 9 May 2005 18:15:21 +0000 (+0000)
Subject: Handle primops created by memchecking MMX code.
X-Git-Tag: svn/VALGRIND_3_0_1^2~160
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3ee0bb34ee8ee475525c07202522b10478f4ba48;p=thirdparty%2Fvalgrind.git

Handle primops created by memchecking MMX code.


git-svn-id: svn://svn.valgrind.org/vex/trunk@1174
---

diff --git a/VEX/priv/host-amd64/isel.c b/VEX/priv/host-amd64/isel.c
index 32958de419..8c355089b7 100644
--- a/VEX/priv/host-amd64/isel.c
+++ b/VEX/priv/host-amd64/isel.c
@@ -764,7 +764,10 @@ static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e )
 /* DO NOT CALL THIS DIRECTLY ! */
 static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
 {
+   /* Used for unary/binary SIMD64 ops. */
+   HWord fn = 0;
    Bool second_is_UInt;
+
    MatchInfo mi;
    DECLARE_PATTERN(p_8Uto64);
    DECLARE_PATTERN(p_1Uto8_64to1);
@@ -807,7 +810,6 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
    case Iex_Binop: {
       AMD64AluOp   aluOp;
       AMD64ShiftOp shOp;
-      HWord fn = 0; /* helper fn for most SIMD64 stuff */
 
 //.. 
 //..       /* Pattern: Sub32(0,x) */
@@ -1484,6 +1486,32 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
          default: 
             break;
       }
+
+      /* Deal with unary 64-bit SIMD ops. */
+      switch (e->Iex.Unop.op) {
+         case Iop_CmpNEZ32x2:
+            fn = (HWord)h_generic_calc_CmpNEZ32x2; break;
+         case Iop_CmpNEZ16x4:
+            fn = (HWord)h_generic_calc_CmpNEZ16x4; break;
+         case Iop_CmpNEZ8x8:
+            fn = (HWord)h_generic_calc_CmpNEZ8x8; break;
+         default:
+            fn = (HWord)0; break;
+      }
+      if (fn != (HWord)0) {
+         /* Note: the following assumes all helpers are of
+            signature 
+               ULong fn ( ULong ), and they are
+            not marked as regparm functions. 
+         */
+         HReg dst = newVRegI(env);
+         HReg arg = iselIntExpr_R(env, e->Iex.Unop.arg);
+         addInstr(env, mk_iMOVsd_RR(arg, hregAMD64_RDI()) );
+         addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 1 ));
+         addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), dst));
+         return dst;
+      }
+
       break;
    }
 
@@ -2522,33 +2550,6 @@ static void iselInt128Expr_wrk ( HReg* rHi, HReg* rLo,
 //..             return;
 //..          }
 //.. 
-//..          case Iop_CmpNEZ32x2:
-//..             fn = (HWord)h_generic_calc_CmpNEZ32x2; goto unish;
-//..          case Iop_CmpNEZ16x4:
-//..             fn = (HWord)h_generic_calc_CmpNEZ16x4; goto unish;
-//..          case Iop_CmpNEZ8x8:
-//..             fn = (HWord)h_generic_calc_CmpNEZ8x8; goto unish;
-//..          unish: {
-//..             /* Note: the following assumes all helpers are of
-//..                signature 
-//..                   ULong fn ( ULong ), and they are
-//..                not marked as regparm functions. 
-//..             */
-//..             HReg xLo, xHi;
-//..             HReg tLo = newVRegI(env);
-//..             HReg tHi = newVRegI(env);
-//..             iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
-//..             addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
-//..             addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
-//..             addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn, 0 ));
-//..             add_to_esp(env, 2*4);
-//..             addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
-//..             addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
-//..             *rHi = tHi;
-//..             *rLo = tLo;
-//..             return;
-//..          }
-//.. 
 //..          default: 
 //..             break;
 //..       }