From: Hugo Villeneuve Date: Mon, 27 Oct 2025 14:29:56 +0000 (-0400) Subject: serial: sc16is7xx: add comments for lock requirements X-Git-Tag: v6.19-rc1~64^2~35 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=42405cb77fd35b5acc0e5a11d74eef68c2afa484;p=thirdparty%2Fkernel%2Flinux.git serial: sc16is7xx: add comments for lock requirements Indicate why lock needs to be asserted when accessing MSR register, as this is not immediately obvious when looking at this register in the device datasheet. Signed-off-by: Hugo Villeneuve Link: https://patch.msgid.link/20251027142957.1032073-15-hugo@hugovil.com Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 4898b4235d0da..1fd64a47341d8 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -499,10 +499,10 @@ EXPORT_SYMBOL_GPL(sc16is762_devtype); static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg) { switch (reg) { - case SC16IS7XX_RHR_REG: - case SC16IS7XX_IIR_REG: - case SC16IS7XX_LSR_REG: - case SC16IS7XX_MSR_REG: + case SC16IS7XX_RHR_REG: /* Shared address space with THR & DLL */ + case SC16IS7XX_IIR_REG: /* Shared address space with FCR & EFR */ + case SC16IS7XX_LSR_REG: /* Shared address space with XON2 */ + case SC16IS7XX_MSR_REG: /* Shared address space with TCR & XOFF1 */ case SC16IS7XX_SPR_REG: /* Shared address space with TLR & XOFF2 */ case SC16IS7XX_TXLVL_REG: case SC16IS7XX_RXLVL_REG: @@ -711,6 +711,7 @@ static void sc16is7xx_update_mlines(struct sc16is7xx_one *one) unsigned long flags; unsigned int status, changed; + /* Lock required as MSR address is shared with TCR and XOFF1. */ lockdep_assert_held_once(&one->lock); status = sc16is7xx_get_hwmctrl(port);