From: Roger Sayle Date: Tue, 21 Jun 2022 23:08:56 +0000 (+0100) Subject: PR target/105991: Recognize PLUS and XOR forms of rldimi in rs6000.md. X-Git-Tag: basepoints/gcc-14~6016 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4306339798b6843937c628c5ece8c234b309b13d;p=thirdparty%2Fgcc.git PR target/105991: Recognize PLUS and XOR forms of rldimi in rs6000.md. This patch addresses PR target/105991 where a change to prefer representing shifts and adds at the tree-level as multiplications, causes problems for the rldimi patterns in the powerpc backend. The issue is that rs6000.md models this pattern using IOR, and some variants that have the equivalent PLUS or XOR in the RTL fail to match some *rotl4_insert patterns. This is fixed in this patch by adding a define_insn_and_split to locally canonicalize the PLUS and XOR forms to the backend's preferred IOR form. An alternative fix might be for the RTL optimizers to define a canonical form for these plus_xor_ior equivalent expressions, but the logical choice might be plus (which may appear in an addressing mode), and such a change may require a number of tweaks to update various backends (i.e. a more intrusive change than the one proposed here). Many thanks for Marek Polacek for bootstrapping and regression testing this change without problems. 2022-06-22 Roger Sayle Marek Polacek Segher Boessenkool Kewen Lin gcc/ChangeLog PR target/105991 * config/rs6000/rs6000.md (rotl3_insert_3): Check that exact_log2 doesn't return -1 (or zero). (plus_xor): New code iterator. (*rotl3_insert_3_): New define_insn_and_split. gcc/testsuite/ChangeLog PR target/105991 * gcc.target/powerpc/pr105991.c: New test case. --- diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c55ee7e171a..090dbcff61d 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4179,7 +4179,8 @@ (match_operand:GPR 4 "const_int_operand" "n")) (ashift:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "n"))))] - "INTVAL (operands[2]) == exact_log2 (UINTVAL (operands[4]) + 1)" + "INTVAL (operands[2]) > 0 + && INTVAL (operands[2]) == exact_log2 (UINTVAL (operands[4]) + 1)" { if (mode == SImode) return "rlwimi %0,%1,%h2,0,31-%h2"; @@ -4188,6 +4189,24 @@ } [(set_attr "type" "insert")]) +; Canonicalize the PLUS and XOR forms to IOR for rotl3_insert_3 +(define_code_iterator plus_xor [plus xor]) + +(define_insn_and_split "*rotl3_insert_3_" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + (plus_xor:GPR + (and:GPR (match_operand:GPR 3 "gpc_reg_operand" "0") + (match_operand:GPR 4 "const_int_operand" "n")) + (ashift:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") + (match_operand:SI 2 "const_int_operand" "n"))))] + "INTVAL (operands[2]) > 0 + && INTVAL (operands[2]) == exact_log2 (UINTVAL (operands[4]) + 1)" + "#" + "&& 1" + [(set (match_dup 0) + (ior:GPR (and:GPR (match_dup 3) (match_dup 4)) + (ashift:GPR (match_dup 1) (match_dup 2))))]) + (define_code_iterator plus_ior_xor [plus ior xor]) (define_split diff --git a/gcc/testsuite/gcc.target/powerpc/pr105991.c b/gcc/testsuite/gcc.target/powerpc/pr105991.c new file mode 100644 index 00000000000..439d10f41a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr105991.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target lp64 } */ +unsigned long long +foo (unsigned long long value) +{ + value &= 0xffffffff; + value |= value << 32; + return value; +} +/* { dg-final { scan-assembler {\mrldimi\M} } } */