From: Andrew Stubbs <ams@codesourcery.com>
Date: Tue, 2 Jul 2019 13:57:56 +0000 (+0000)
Subject: Fix regrename ICE.
X-Git-Tag: releases/gcc-9.2.0~178
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=43806b822b83b25d57fa603c48bb5a1f5741442f;p=thirdparty%2Fgcc.git

Fix regrename ICE.

2019-07-02  Andrew Stubbs  <ams@codesourcery.com>

	Backport from mainline:
	gcc/
	2019-07-02  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn
	with inlined save and restore.

From-SVN: r272938
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 804387fac401..8126dcb469f3 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-07-02  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from mainline:
+	2019-07-02  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn.md (movdi_symbol_save_scc): Convert to define_insn
+	with inlined save and restore.
+
 2019-07-01  Eric Botcazou  <ebotcazou@adacore.com>
 
 	PR middle-end/64242
diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md
index 1f06d0bd5cc9..7e5cf17629de 100644
--- a/gcc/config/gcn/gcn.md
+++ b/gcc/config/gcn/gcn.md
@@ -830,18 +830,36 @@
  [(set_attr "type" "mult")
   (set_attr "length" "32")])
 
-(define_insn_and_split "movdi_symbol_save_scc"
+(define_insn "movdi_symbol_save_scc"
  [(set (match_operand:DI 0 "nonimmediate_operand" "=Sg")
        (match_operand:DI 1 "general_operand" "Y"))
   (clobber (reg:BI CC_SAVE_REG))]
- "GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == LABEL_REF
+ "(GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == LABEL_REF)
   && (lra_in_progress || reload_completed)"
- "#"
- "reload_completed"
- [(set (reg:BI CC_SAVE_REG) (reg:BI SCC_REG))
-  (parallel [(set (match_dup 0) (match_dup 1))
-	     (clobber (reg:BI SCC_REG))])
-  (set (reg:BI SCC_REG) (reg:BI CC_SAVE_REG))])
+  {
+    /* !!! These sequences clobber CC_SAVE_REG.  */
+
+    if (SYMBOL_REF_P (operands[1])
+	&& SYMBOL_REF_WEAK (operands[1]))
+	return "; s_mov_b32\ts22, scc is not supported by the assembler.\;"
+	       ".long\t0xbe9600fd\;"
+	       "s_getpc_b64\t%0\;"
+	       "s_add_u32\t%L0, %L0, %1@gotpcrel32@lo+4\;"
+	       "s_addc_u32\t%H0, %H0, %1@gotpcrel32@hi+4\;"
+	       "s_load_dwordx2\t%0, %0\;"
+	       "s_cmpk_lg_u32\ts22, 0\;"
+	       "s_waitcnt\tlgkmcnt(0)";
+
+    return "; s_mov_b32\ts22, scc is not supported by the assembler.\;"
+	   ".long\t0xbe9600fd\;"
+	   "s_getpc_b64\t%0\;"
+	   "s_add_u32\t%L0, %L0, %1@rel32@lo+4\;"
+	   "s_addc_u32\t%H0, %H0, %1@rel32@hi+4\;"
+	   "s_cmpk_lg_u32\ts22, 0";
+  }
+ [(set_attr "type" "mult")
+  (set_attr "length" "40")])
+
 
 (define_insn "gcn_indirect_call"
   [(call (mem (match_operand:DI 0 "register_operand" "Sg"))