From: Markos Chandras Date: Tue, 3 Mar 2015 18:48:48 +0000 (+0000) Subject: MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case X-Git-Tag: v4.0.3~56 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=44e6ee09bec252201891304cff339fb5bcfe4fc5;p=thirdparty%2Fkernel%2Fstable.git MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case Commit 518222161d4a2d3f3b2700098563b62383f83878 upstream. Commit 5753762cbd1c("MIPS: asm: spinlock: Replace "sub" instruction with "addiu") replaced the "sub" instruction with addiu but it did not update the immediate value in the R10000_LLSC_WAR case. Signed-off-by: Markos Chandras Fixes: 5753762cbd1c("MIPS: asm: spinlock: Replace "sub" instruction with "addiu"") Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9385/ Signed-off-by: Ralf Baechle Signed-off-by: Greg Kroah-Hartman --- diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h index b4548690ade99..1fca2e0793dcb 100644 --- a/arch/mips/include/asm/spinlock.h +++ b/arch/mips/include/asm/spinlock.h @@ -263,7 +263,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) if (R10000_LLSC_WAR) { __asm__ __volatile__( "1: ll %1, %2 # arch_read_unlock \n" - " addiu %1, 1 \n" + " addiu %1, -1 \n" " sc %1, %0 \n" " beqzl %1, 1b \n" : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)