From: Michael Walle Date: Wed, 12 May 2021 14:12:47 +0000 (+0200) Subject: serial: fsl_lpuart: don't modify arbitrary data on lpuart32 X-Git-Tag: v5.12.17~181 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4504f230a678d3106bc733e9f5a0a038a80e8bdf;p=thirdparty%2Fkernel%2Fstable.git serial: fsl_lpuart: don't modify arbitrary data on lpuart32 [ Upstream commit ccf08fd1204bcb5311cc10aea037c71c6e74720a ] lpuart_rx_dma_startup() is used for both the 8 bit and the 32 bit version of the LPUART. Modify the UARTCR only for the 8 bit version. Fixes: f4eef224a09f ("serial: fsl_lpuart: add sysrq support when using dma") Signed-off-by: Michael Walle Link: https://lore.kernel.org/r/20210512141255.18277-2-michael@walle.cc Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 794035041744f..fbf2e4d2d22b2 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -1625,7 +1625,7 @@ static void lpuart_rx_dma_startup(struct lpuart_port *sport) sport->lpuart_dma_rx_use = true; rx_dma_timer_init(sport); - if (sport->port.has_sysrq) { + if (sport->port.has_sysrq && !lpuart_is_32(sport)) { cr3 = readb(sport->port.membase + UARTCR3); cr3 |= UARTCR3_FEIE; writeb(cr3, sport->port.membase + UARTCR3);