From: Jack Xiao Date: Thu, 30 Nov 2023 10:22:34 +0000 (+0800) Subject: drm/amdgpu/mes12: update data cache boundary X-Git-Tag: v6.11-rc1~141^2~25^2~442 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4632bec9fa682a231e4548dc793da2f1e209c798;p=thirdparty%2Fkernel%2Flinux.git drm/amdgpu/mes12: update data cache boundary Enlarge the data cache boundary. v2: use the fix data cache boundary. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c index 8ab85e6231922..2d713e7b976aa 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c @@ -685,8 +685,8 @@ static int mes_v12_0_load_microcode(struct amdgpu_device *adev, WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI, upper_32_bits(adev->mes.data_fw_gpu_addr[pipe])); - /* Set 0x3FFFF (256K-1) to CP_MES_MDBOUND_LO */ - WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x3FFFF); + /* Set data cache boundary CP_MES_MDBOUND_LO */ + WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF); if (prime_icache) { /* invalidate ICACHE */