From: Julian Seward Date: Tue, 18 Aug 2015 19:55:16 +0000 (+0000) Subject: Implement YIELD. Followup to #348377. X-Git-Tag: svn/VALGRIND_3_11_0^2~13 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=46c09aad4d9ab67f1f95201532f0aa8c987902cb;p=thirdparty%2Fvalgrind.git Implement YIELD. Followup to #348377. git-svn-id: svn://svn.valgrind.org/vex/trunk@3178 --- diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c index 39cb4f316b..d9c03cc5b0 100644 --- a/VEX/priv/guest_arm64_toIR.c +++ b/VEX/priv/guest_arm64_toIR.c @@ -6859,6 +6859,19 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn, return True; } + /* ------------------- YIELD ------------------- */ + /* 31 23 15 7 + 1101 0101 0000 0011 0010 0000 0011 1111 + */ + if (INSN(31,0) == 0xD503203F) { + /* Request yield followed by continuation at the next insn. */ + putPC(mkU64(guest_PC_curr_instr + 4)); + dres->whatNext = Dis_StopHere; + dres->jk_StopHere = Ijk_Yield; + DIP("yield\n"); + return True; + } + //fail: vex_printf("ARM64 front end: branch_etc\n"); return False; diff --git a/VEX/priv/host_arm64_defs.c b/VEX/priv/host_arm64_defs.c index b886e81cc2..90de091cb9 100644 --- a/VEX/priv/host_arm64_defs.c +++ b/VEX/priv/host_arm64_defs.c @@ -3617,7 +3617,7 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc, case Ijk_ClientReq: trcval = VEX_TRC_JMP_CLIENTREQ; break; case Ijk_Sys_syscall: trcval = VEX_TRC_JMP_SYS_SYSCALL; break; //case Ijk_Sys_int128: trcval = VEX_TRC_JMP_SYS_INT128; break; - //case Ijk_Yield: trcval = VEX_TRC_JMP_YIELD; break; + case Ijk_Yield: trcval = VEX_TRC_JMP_YIELD; break; //case Ijk_EmWarn: trcval = VEX_TRC_JMP_EMWARN; break; //case Ijk_MapFail: trcval = VEX_TRC_JMP_MAPFAIL; break; case Ijk_NoDecode: trcval = VEX_TRC_JMP_NODECODE; break; diff --git a/VEX/priv/host_arm64_isel.c b/VEX/priv/host_arm64_isel.c index 0568fdeff5..74dc1619a2 100644 --- a/VEX/priv/host_arm64_isel.c +++ b/VEX/priv/host_arm64_isel.c @@ -3975,6 +3975,7 @@ static void iselNext ( ISelEnv* env, case Ijk_InvalICache: case Ijk_FlushDCache: case Ijk_SigTRAP: + case Ijk_Yield: { HReg r = iselIntExpr_R(env, next); ARM64AMode* amPC = mk_baseblock_64bit_access_amode(offsIP);