From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Date: Fri, 3 Apr 2026 14:13:37 +0000 (+0300)
Subject: soc: renesas: r9a08g045-sysc: Move common code to a helper
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=47ec5ac9d4e9b7e99102a282a79c47c3c6ca8b5c;p=thirdparty%2Fkernel%2Flinux.git

soc: renesas: r9a08g045-sysc: Move common code to a helper

Move common code from rzg3s_regmap_{readable,writeable}_reg() to a
helper and use it to avoid code duplication.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260403141341.2851926-2-claudiu.beznea.uj@bp.reneasas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

diff --git a/drivers/soc/renesas/r9a08g045-sysc.c b/drivers/soc/renesas/r9a08g045-sysc.c
index 03d653d5cde55..63e4aa6a7cd01 100644
--- a/drivers/soc/renesas/r9a08g045-sysc.c
+++ b/drivers/soc/renesas/r9a08g045-sysc.c
@@ -37,18 +37,14 @@ static const struct rz_sysc_soc_id_init_data rzg3s_sysc_soc_id_init_data __initc
 	.specific_id_mask = GENMASK(27, 0),
 };
 
-static bool rzg3s_regmap_readable_reg(struct device *dev, unsigned int reg)
+static bool rzg3s_regmap_readable_writeable_reg(unsigned int reg)
 {
 	switch (reg) {
 	case SYS_XSPI_MAP_STAADD_CS0:
 	case SYS_XSPI_MAP_ENDADD_CS0:
 	case SYS_XSPI_MAP_STAADD_CS1:
 	case SYS_XSPI_MAP_ENDADD_CS1:
-	case SYS_GETH0_CFG:
-	case SYS_GETH1_CFG:
 	case SYS_PCIE_CFG:
-	case SYS_PCIE_MON:
-	case SYS_PCIE_ERR_MON:
 	case SYS_PCIE_PHY:
 	case SYS_I2C0_CFG:
 	case SYS_I2C1_CFG:
@@ -63,28 +59,27 @@ static bool rzg3s_regmap_readable_reg(struct device *dev, unsigned int reg)
 	}
 }
 
-static bool rzg3s_regmap_writeable_reg(struct device *dev, unsigned int reg)
+static bool rzg3s_regmap_readable_reg(struct device *dev, unsigned int reg)
 {
+	if (rzg3s_regmap_readable_writeable_reg(reg))
+		return true;
+
 	switch (reg) {
-	case SYS_XSPI_MAP_STAADD_CS0:
-	case SYS_XSPI_MAP_ENDADD_CS0:
-	case SYS_XSPI_MAP_STAADD_CS1:
-	case SYS_XSPI_MAP_ENDADD_CS1:
-	case SYS_PCIE_CFG:
-	case SYS_PCIE_PHY:
-	case SYS_I2C0_CFG:
-	case SYS_I2C1_CFG:
-	case SYS_I2C2_CFG:
-	case SYS_I2C3_CFG:
-	case SYS_I3C_CFG:
-	case SYS_USB_PWRRDY:
-	case SYS_PCIE_RST_RSM_B:
+	case SYS_GETH0_CFG:
+	case SYS_GETH1_CFG:
+	case SYS_PCIE_MON:
+	case SYS_PCIE_ERR_MON:
 		return true;
 	default:
 		return false;
 	}
 }
 
+static bool rzg3s_regmap_writeable_reg(struct device *dev, unsigned int reg)
+{
+	return rzg3s_regmap_readable_writeable_reg(reg);
+}
+
 const struct rz_sysc_init_data rzg3s_sysc_init_data __initconst = {
 	.soc_id_init_data = &rzg3s_sysc_soc_id_init_data,
 	.readable_reg = rzg3s_regmap_readable_reg,