From: Patrick O'Neill <patrick@rivosinc.com>
Date: Fri, 21 Apr 2023 20:11:35 +0000 (-0700)
Subject: RISC-V: Enforce subword atomic LR/SC SEQ_CST
X-Git-Tag: basepoints/gcc-15~9739
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4990cf84c460f064d6281d0813f20b0ef20c7448;p=thirdparty%2Fgcc.git

RISC-V: Enforce subword atomic LR/SC SEQ_CST

Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.

2023-04-27 Patrick O'Neill <patrick@rivosinc.com>

gcc/ChangeLog:

	* config/riscv/sync.md: Change LR.aq/SC.rl pairs into
	sequentially consistent LR.aqrl/SC.rl pairs.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---

diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index 192745282626..0c83ef046070 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -109,7 +109,7 @@
   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
   {
     return "1:\;"
-	   "lr.w.aq\t%0, %1\;"
+	   "lr.w.aqrl\t%0, %1\;"
 	   "<insn>\t%5, %0, %2\;"
 	   "and\t%5, %5, %3\;"
 	   "and\t%6, %0, %4\;"
@@ -173,7 +173,7 @@
   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
   {
     return "1:\;"
-	   "lr.w.aq\t%0, %1\;"
+	   "lr.w.aqrl\t%0, %1\;"
 	   "and\t%5, %0, %2\;"
 	   "not\t%5, %5\;"
 	   "and\t%5, %5, %3\;"
@@ -278,7 +278,7 @@
   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
   {
     return "1:\;"
-	   "lr.w.aq\t%0, %1\;"
+	   "lr.w.aqrl\t%0, %1\;"
 	   "and\t%4, %0, %3\;"
 	   "or\t%4, %4, %2\;"
 	   "sc.w.rl\t%4, %4, %1\;"
@@ -443,7 +443,7 @@
   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
   {
     return "1:\;"
-	   "lr.w.aq\t%0, %1\;"
+	   "lr.w.aqrl\t%0, %1\;"
 	   "and\t%6, %0, %4\;"
 	   "bne\t%6, %z2, 1f\;"
 	   "and\t%6, %0, %5\;"