From: Lehua Ding <lehua.ding@rivai.ai>
Date: Tue, 20 Jun 2023 09:45:17 +0000 (+0800)
Subject: RISC-V: Fix compiler warning of riscv_arg_has_vector
X-Git-Tag: basepoints/gcc-15~8149
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4a6c44f4ad4198382b7c70f4d40eefb69e71132e;p=thirdparty%2Fgcc.git

RISC-V: Fix compiler warning of riscv_arg_has_vector

Hi,

This little patch fixes a compile warning issue that my previous patch
introduced, sorry for introducing this issue.

Best,
Lehua

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_arg_has_vector): Add default
	switch handler.
---

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 6eb63a9d4de7..9558e28de3fc 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3820,8 +3820,8 @@ riscv_arg_has_vector (const_tree type)
   switch (TREE_CODE (type))
     {
     case RECORD_TYPE:
-      /* If it is a record, it is further determined whether its fileds have
-         vector type.  */
+      /* If it is a record, it is further determined whether its fields have
+	 vector type.  */
       for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f))
 	if (TREE_CODE (f) == FIELD_DECL)
 	  {
@@ -3835,6 +3835,8 @@ riscv_arg_has_vector (const_tree type)
       break;
     case ARRAY_TYPE:
       return riscv_arg_has_vector (TREE_TYPE (type));
+    default:
+      break;
     }
 
   return false;