From: Philippe Mathieu-Daudé Date: Wed, 18 Mar 2026 10:31:13 +0000 (+0100) Subject: target/riscv: Simplify riscv_cpu_gdb_write_register() X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4adb9ebdb1d910d2ffb9730aaddcc6dc8aa89a41;p=thirdparty%2Fqemu.git target/riscv: Simplify riscv_cpu_gdb_write_register() Use a single ldn() call, sign-extend once. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-ID: <20260318103122.97244-9-philmd@linaro.org> Signed-off-by: Alistair Francis --- diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index be42566bcc8..a5c12638782 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -84,33 +84,20 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs); RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; - int length = 0; - uint64_t tmp; + const size_t regsize = mcc->def->misa_mxl_max == MXL_RV32 ? 4 : 8; + uint64_t tmp = ldn(env, mem_buf, regsize); - switch (mcc->def->misa_mxl_max) { - case MXL_RV32: - tmp = (int32_t)ldn(env, mem_buf, 4); - length = 4; - break; - case MXL_RV64: - case MXL_RV128: - if (env->xl < MXL_RV64) { - tmp = (int32_t)ldn(env, mem_buf, 8); - } else { - tmp = ldn(env, mem_buf, 8); - } - length = 8; - break; - default: - g_assert_not_reached(); + if (env->xl < MXL_RV64) { + tmp = (int32_t)tmp; } + if (n > 0 && n < 32) { env->gpr[n] = tmp; } else if (n == 32) { env->pc = tmp; } - return length; + return regsize; } static int riscv_gdb_get_fpu(CPUState *cs, GByteArray *buf, int n)