From: Mrinmay Sarkar Date: Mon, 11 Mar 2024 14:11:37 +0000 (+0530) Subject: arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent X-Git-Tag: v6.11-rc1~188^2~8^2~194 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4b220c6fa9f379cb8803dbca73ae1f4128dfa5c8;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent The PCIe EP controller on SA8775P supports cache coherency, hence add the "dma-coherent" property to mark it as such. Signed-off-by: Mrinmay Sarkar Reviewed-by: Manivannan Sadhasivam Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1710166298-27144-4-git-send-email-quic_msarkar@quicinc.com Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index dcb2d8435d47a..5632fa896b93a 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -4649,6 +4649,7 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>; interconnect-names = "pcie-mem", "cpu-pcie"; + dma-coherent; iommus = <&pcie_smmu 0x0000 0x7f>; resets = <&gcc GCC_PCIE_0_BCR>; reset-names = "core";