From: Uros Bizjak <ubizjak@gmail.com>
Date: Tue, 21 Jul 2020 18:22:05 +0000 (+0200)
Subject: i386: Fix insn conditions of mfence patterns [PR95750]
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4be1ce4f5d16c3a3f95bd194ac938797d52dcafb;p=thirdparty%2Fgcc.git

i386: Fix insn conditions of mfence patterns [PR95750]

2020-07-21  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:
	PR target/95750
	* config/i386/sync.md (mfence_sse2): Enable for
	TARGET_64BIT and TARGET_SSE2.
	(mfence_nosse): Always enable.
---

diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index c6827037abf3..c88750d36641 100644
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -89,8 +89,7 @@
 (define_insn "mfence_sse2"
   [(set (match_operand:BLK 0)
 	(unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))]
-  "(TARGET_64BIT || TARGET_SSE2)
-   && !TARGET_AVOID_MFENCE"
+  "TARGET_64BIT || TARGET_SSE2"
   "mfence"
   [(set_attr "type" "sse")
    (set_attr "length_address" "0")
@@ -101,8 +100,7 @@
   [(set (match_operand:BLK 0)
 	(unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))
    (clobber (reg:CC FLAGS_REG))]
-  "!(TARGET_64BIT || TARGET_SSE2)
-   || TARGET_AVOID_MFENCE"
+  ""
 {
   rtx mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);