From: Wilco Dijkstra Date: Thu, 2 Jan 2025 19:46:07 +0000 (+0000) Subject: AArch64: Simplify lrint X-Git-Tag: glibc-2.42~445 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4c1137910683c12cf1edb31e511e11289cd1a9db;p=thirdparty%2Fglibc.git AArch64: Simplify lrint Simplify lrint. Reviewed-by: Adhemerval Zanella  --- diff --git a/sysdeps/aarch64/fpu/s_lrint.c b/sysdeps/aarch64/fpu/s_lrint.c index 904c42ccd9..66b3cca399 100644 --- a/sysdeps/aarch64/fpu/s_lrint.c +++ b/sysdeps/aarch64/fpu/s_lrint.c @@ -22,60 +22,9 @@ #include #include -# define IREG_SIZE 64 - -# ifdef __ILP32__ -# define OREG_SIZE 32 -# else -# define OREG_SIZE 64 -# endif - -# define IREGS "d" - -#if OREG_SIZE == 32 -# define OREGS "w" -#else -# define OREGS "x" -#endif - - long int __lrint (double x) { - -#if IREG_SIZE == 64 && OREG_SIZE == 32 - long int result; - - if (__builtin_fabs (x) > INT32_MAX) - { - /* Converting large values to a 32 bit int may cause the frintx/fcvtza - sequence to set both FE_INVALID and FE_INEXACT. To avoid this - check the rounding mode and do a single instruction with the - appropriate rounding mode. */ - - switch (get_rounding_mode ()) - { - case FE_TONEAREST: - asm volatile ("fcvtns" "\t%" OREGS "0, %" IREGS "1" - : "=r" (result) : "w" (x)); - break; - case FE_UPWARD: - asm volatile ("fcvtps" "\t%" OREGS "0, %" IREGS "1" - : "=r" (result) : "w" (x)); - break; - case FE_DOWNWARD: - asm volatile ("fcvtms" "\t%" OREGS "0, %" IREGS "1" - : "=r" (result) : "w" (x)); - break; - case FE_TOWARDZERO: - default: - asm volatile ("fcvtzs" "\t%" OREGS "0, %" IREGS "1" - : "=r" (result) : "w" (x)); - } - return result; - } -#endif - double r = __builtin_rint (x); /* Prevent gcc from calling lrint directly when compiled with