From: Jan Beulich Date: Fri, 5 Dec 2025 09:12:34 +0000 (+0100) Subject: x86: sub-divide APX_F - NCI-NDD-NF and testing X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4c1e38095bd659f3d3f64de8f78bb49cafbd795e;p=thirdparty%2Fbinutils-gdb.git x86: sub-divide APX_F - NCI-NDD-NF and testing To reflect spec version 007's introduction of the three-way APX-NCI-NDD-NF also introduce a respective ISA specifier, without that actually having a counterpart in opcodes. Add a testcase to cover all four new ISA specifiers. --- diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index ae97522b10d..e7682a4e096 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1049,6 +1049,12 @@ const relax_typeS md_relax_table[] = { STRING_COMMA_LEN (#n), false, PROCESSOR_NONE, vsz_ ## v, \ CPU_ ## e ## _FLAGS, CPU_ ## d ## _FLAGS } +#define CPU_ANY_APX_NCI_NDD_NF_FLAGS \ + { .bitfield = \ + { .cpuapx_nci = true, \ + .cpuapx_ndd = true, \ + .cpuapx_nf = true } } + static const arch_entry cpu_arch[] = { /* Do not replace the first two entries - i386_target_format() and @@ -1243,6 +1249,7 @@ static const arch_entry cpu_arch[] = SUBARCH (apx_nci, APX_NCI, ANY_APX_NCI, false), SUBARCH (apx_ndd, APX_NDD, ANY_APX_NDD, false), SUBARCH (apx_nf, APX_NF, ANY_APX_NF, false), + SUBARCH (apx_nci_ndd_nf, APX_NCI_NDD_NF, ANY_APX_NCI_NDD_NF, false), VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set), SUBARCH (gmism2, GMISM2, GMISM2, false), SUBARCH (gmiccs, GMICCS, GMICCS, false), diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 3030330639c..a88860254cd 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -223,6 +223,7 @@ accept various extension mnemonics. For example, @code{apx_nci}, @code{apx_ndd}, @code{apx_nf}, +@code{apx_nci_ndd_nf}, @code{avx10.2}, @code{avx10.2/512}, @code{avx10.2/256}, @@ -1735,7 +1736,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.rdpru} @item @samp{.mcommit} @tab @samp{.sev_es} @tab @samp{.snp} @tab @samp{.invlpgb} @item @samp{.tlbsync} @tab @samp{.rmpquery} @tab @samp{.rmpread} @tab @samp{.apx_f} -@item @samp{.apx_nci} @tab @samp{.apx_ndd} @tab @samp{.apx_nf} +@item @samp{.apx_nci} @tab @samp{.apx_ndd} @tab @samp{.apx_nf} @tab @samp{.apx_nci_ndd_nf} @item @samp{.gmism2} @tab @samp{.gmiccs} @tab @samp{.padlockrng2} @tab @samp{.padlockphe2} @item @samp{.padlockxmodx} diff --git a/gas/testsuite/gas/i386/apx-nci-ndd-nf.l b/gas/testsuite/gas/i386/apx-nci-ndd-nf.l new file mode 100644 index 00000000000..e07ddc272a1 --- /dev/null +++ b/gas/testsuite/gas/i386/apx-nci-ndd-nf.l @@ -0,0 +1,203 @@ +.* Assembler messages: +.*:14: Error: no EVEX encoding for `add' +.*:15: Error: .* `add' +.*:16: Error: `{nf}' is not supported on `generic64\..*\.apx_f' +.*:18: Error: .* `adox' +.*:20: Error: `{nf}' is not supported on `generic64\..*\.apx_f' +.*:21: Error: `ccmpz' is not supported on `generic64\..*\.apx_f' +.*:22: Error: `cfcmovz' is not supported on `generic64\..*\.apx_f' +.*:23: Error: `cfcmovz' is not supported on `generic64\..*\.apx_f' +.*:24: Error: `cfcmovz' is not supported on `generic64\..*\.apx_f' +.*:25: Error: .* `cmovz' +.*:26: Error: no EVEX encoding for `cmp' +.*:27: Error: no EVEX encoding for `lzcnt' +.*:28: Error: `{nf}' is not supported on `generic64\..*\.apx_f' +.*:29: Error: no EVEX encoding for `tzcnt' +# NCI +.*:14: Error: no EVEX encoding for `add' +.*:15: Error: .* `add' +.*:16: Error: `{nf}' is not supported on `generic64\..*\.apx_nci' +.*:18: Error: .* `adox' +.*:20: Error: `{nf}' is not supported on `generic64\..*\.apx_nci' +.*:27: Error: no EVEX encoding for `lzcnt' +.*:28: Error: `{nf}' is not supported on `generic64\..*\.apx_nci' +.*:29: Error: no EVEX encoding for `tzcnt' +# NDD +.*:16: Error: `{nf}' is not supported on `generic64\..*\.apx_ndd' +.*:20: Error: `{nf}' is not supported on `generic64\..*\.apx_ndd' +.*:21: Error: `ccmpz' is not supported on `generic64\..*\.apx_ndd' +.*:22: Error: `cfcmovz' is not supported on `generic64\..*\.apx_ndd' +.*:23: Error: `cfcmovz' is not supported on `generic64\..*\.apx_ndd' +.*:24: Error: `cfcmovz' is not supported on `generic64\..*\.apx_ndd' +.*:25: Error: .* `cmovz' +.*:26: Error: no EVEX encoding for `cmp' +.*:28: Error: `{nf}' is not supported on `generic64\..*\.apx_ndd' +# NF +.*:14: Error: no EVEX encoding for `add' +.*:15: Error: .* `add' +.*:16: Error: .* `add' +.*:18: Error: .* `adox' +.*:21: Error: `ccmpz' is not supported on `generic64\..*\.apx_nf' +.*:22: Error: `cfcmovz' is not supported on `generic64\..*\.apx_nf' +.*:23: Error: `cfcmovz' is not supported on `generic64\..*\.apx_nf' +.*:24: Error: `cfcmovz' is not supported on `generic64\..*\.apx_nf' +.*:25: Error: .* `cmovz' +.*:26: Error: no EVEX encoding for `cmp' +.*:27: Error: no EVEX encoding for `lzcnt' +.*:28: Error: .* `popcnt' +.*:29: Error: no EVEX encoding for `tzcnt' +#... +[ ]*[0-9]+[ ]+\.irp feat, .* +#... +[ ]*[0-9]+[ ]+\.endr +#... +[ ]*[0-9]+[ ]+> apx_f: +#... +[ ]*[0-9]+[ ]+> +\.arch \.apx_f +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+> +\{evex\} add %r16,%r17 +[ ]*[0-9]+[ ]+> +add %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +\{nf\} add %r16,%r17 +[ ]*[0-9]+[ ]+\?+ 62ECFE08[ ]+> +adox %r16,%r17 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+> +adox %r16,%r17,%r18 +[ ]*[0-9]+[ ]+\?+ 62EAF400[ ]+> +andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+F2D0 +[ ]*[0-9]+[ ]+> +\{nf\} andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +ccmpz %r16,%r17 +[ ]*[0-9]+[ ]+> +\{load\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+> +\{store\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+> +cfcmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +cmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +\{evex\} cmp %r16,%r17 +[ ]*[0-9]+[ ]+> +\{evex\} lzcnt %r16,%r17 +[ ]*[0-9]+[ ]+> +\{nf\} popcnt %r16,%r17 +[ ]*[0-9]+[ ]+> +\{evex\} tzcnt %r16,%r17 +#... +[ ]*[0-9]+[ ]+> apx_nci: +#... +[ ]*[0-9]+[ ]+> +\.arch \.apx_nci +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+> +\{evex\} add %r16,%r17 +[ ]*[0-9]+[ ]+> +add %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +\{nf\} add %r16,%r17 +[ ]*[0-9]+[ ]+\?+ 62ECFE08[ ]+> +adox %r16,%r17 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+> +adox %r16,%r17,%r18 +[ ]*[0-9]+[ ]+\?+ 62EAF400[ ]+> +andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+F2D0 +[ ]*[0-9]+[ ]+> +\{nf\} andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+\?+ 62EC8404[ ]+> +ccmpz %r16,%r17 +[ ]*[0-9]+[ ]+39C1 +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{load\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+44C8 +[ ]*[0-9]+[ ]+\?+ 62ECFC0C[ ]+> +\{store\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+44C1 +[ ]*[0-9]+[ ]+\?+ 62ECEC14[ ]+> +cfcmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+44C8 +[ ]*[0-9]+[ ]+\?+ 62ECEC10[ ]+> +cmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+44C8 +[ ]*[0-9]+[ ]+\?+ 62EC840A[ ]+> +\{evex\} cmp %r16,%r17 +[ ]*[0-9]+[ ]+39C1 +[ ]*[0-9]+[ ]+> +\{evex\} lzcnt %r16,%r17 +[ ]*[0-9]+[ ]+> +\{nf\} popcnt %r16,%r17 +[ ]*[0-9]+[ ]+> +\{evex\} tzcnt %r16,%r17 +#... +[ ]*[0-9]+[ ]+> apx_ndd: +#... +[ ]*[0-9]+[ ]+> +\.arch \.apx_ndd +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{evex\} add %r16,%r17 +[ ]*[0-9]+[ ]+01C1 +[ ]*[0-9]+[ ]+\?+ 62ECEC10[ ]+> +add %r16,%r17,%r18 +[ ]*[0-9]+[ ]+01C1 +[ ]*[0-9]+[ ]+> +\{nf\} add %r16,%r17 +[ ]*[0-9]+[ ]+\?+ 62ECFE08[ ]+> +adox %r16,%r17 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+\?+ 62ECEE10[ ]+> +adox %r16,%r17,%r18 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+\?+ 62EAF400[ ]+> +andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+F2D0 +[ ]*[0-9]+[ ]+> +\{nf\} andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +ccmpz %r16,%r17 +[ ]*[0-9]+[ ]+> +\{load\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+> +\{store\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+> +cfcmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +cmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +\{evex\} cmp %r16,%r17 +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{evex\} lzcnt %r16,%r17 +[ ]*[0-9]+[ ]+F5C8 +[ ]*[0-9]+[ ]+> +\{nf\} popcnt %r16,%r17 +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{evex\} tzcnt %r16,%r17 +[ ]*[0-9]+[ ]+F4C8 +#... +[ ]*[0-9]+[ ]+> apx_nf: +#... +[ ]*[0-9]+[ ]+> +\.arch \.apx_nf +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+> +\{evex\} add %r16,%r17 +[ ]*[0-9]+[ ]+> +add %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +\{nf\} add %r16,%r17 +[ ]*[0-9]+[ ]+\?+ 62ECFE08[ ]+> +adox %r16,%r17 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+> +adox %r16,%r17,%r18 +[ ]*[0-9]+[ ]+\?+ 62EAF400[ ]+> +andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+F2D0 +[ ]*[0-9]+[ ]+\?+ 62EAF404[ ]+> +\{nf\} andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+F2D0 +[ ]*[0-9]+[ ]+> +ccmpz %r16,%r17 +[ ]*[0-9]+[ ]+> +\{load\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+> +\{store\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+> +cfcmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +cmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+> +\{evex\} cmp %r16,%r17 +[ ]*[0-9]+[ ]+> +\{evex\} lzcnt %r16,%r17 +[ ]*[0-9]+[ ]+> +\{nf\} popcnt %r16,%r17 +[ ]*[0-9]+[ ]+> +\{evex\} tzcnt %r16,%r17 +#... +[ ]*[0-9]+[ ]+> apx_nci_ndd_nf: +#... +[ ]*[0-9]+[ ]+> +\.arch \.apx_nci_ndd_nf +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{evex\} add %r16,%r17 +[ ]*[0-9]+[ ]+01C1 +[ ]*[0-9]+[ ]+\?+ 62ECEC10[ ]+> +add %r16,%r17,%r18 +[ ]*[0-9]+[ ]+01C1 +[ ]*[0-9]+[ ]+\?+ 62ECFC0C[ ]+> +\{nf\} add %r16,%r17 +[ ]*[0-9]+[ ]+01C1 +[ ]*[0-9]+[ ]+\?+ 62ECFE08[ ]+> +adox %r16,%r17 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+\?+ 62ECEE10[ ]+> +adox %r16,%r17,%r18 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+\?+ 62EAF400[ ]+> +andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+F2D0 +[ ]*[0-9]+[ ]+\?+ 62EAF404[ ]+> +\{nf\} andn %r16,%r17,%r18 +[ ]*[0-9]+[ ]+F2D0 +[ ]*[0-9]+[ ]+\?+ 62EC8404[ ]+> +ccmpz %r16,%r17 +[ ]*[0-9]+[ ]+39C1 +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{load\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+44C8 +[ ]*[0-9]+[ ]+\?+ 62ECFC0C[ ]+> +\{store\} cfcmovz %r16,%r17 +[ ]*[0-9]+[ ]+44C1 +[ ]*[0-9]+[ ]+\?+ 62ECEC14[ ]+> +cfcmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+44C8 +[ ]*[0-9]+[ ]+\?+ 62ECEC10[ ]+> +cmovz %r16,%r17,%r18 +[ ]*[0-9]+[ ]+44C8 +[ ]*[0-9]+[ ]+\?+ 62EC840A[ ]+> +\{evex\} cmp %r16,%r17 +[ ]*[0-9]+[ ]+39C1 +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{evex\} lzcnt %r16,%r17 +[ ]*[0-9]+[ ]+F5C8 +[ ]*[0-9]+[ ]+\?+ 62ECFC0C[ ]+> +\{nf\} popcnt %r16,%r17 +[ ]*[0-9]+[ ]+88C8 +[ ]*[0-9]+[ ]+\?+ 62ECFC08[ ]+> +\{evex\} tzcnt %r16,%r17 +[ ]*[0-9]+[ ]+F4C8 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+ +[ ]*[0-9]+[ ]+\.arch default +[ ]*[0-9]+[ ]+\.arch \.noapx_nci_ndd_nf +[ ]*[0-9]+[ ]+\?+ D55801C1[ ]+add[ ]+%r16, %r17 +[ ]*[0-9]+[ ]+\?+ 62ECFE08[ ]+adox[ ]+%r16, %r17 +[ ]*[0-9]+[ ]+66C8 +[ ]*[0-9]+[ ]+\?+ 62EAF400[ ]+andn[ ]+%r16, %r17, %r18 +[ ]*[0-9]+[ ]+F2D0 +#pass diff --git a/gas/testsuite/gas/i386/apx-nci-ndd-nf.s b/gas/testsuite/gas/i386/apx-nci-ndd-nf.s new file mode 100644 index 00000000000..ebffc24dae6 --- /dev/null +++ b/gas/testsuite/gas/i386/apx-nci-ndd-nf.s @@ -0,0 +1,37 @@ +# .arch .apx_n* directives + + .text + .irp feat, f, nci, ndd, nf, nci_ndd_nf + +apx_\feat: + .arch generic64 + .arch .adx + .arch .bmi + .arch .lzcnt + .arch .popcnt + .arch .apx_\feat + + {evex} add %r16, %r17 + add %r16, %r17, %r18 + {nf} add %r16, %r17 + adox %r16, %r17 + adox %r16, %r17, %r18 + andn %r16, %r17, %r18 + {nf} andn %r16, %r17, %r18 + ccmpz %r16, %r17 + {load} cfcmovz %r16, %r17 + {store} cfcmovz %r16, %r17 + cfcmovz %r16, %r17, %r18 + cmovz %r16, %r17, %r18 + {evex} cmp %r16, %r17 + {evex} lzcnt %r16, %r17 + {nf} popcnt %r16, %r17 + {evex} tzcnt %r16, %r17 + + .endr + + .arch default + .arch .noapx_nci_ndd_nf + add %r16, %r17 + adox %r16, %r17 + andn %r16, %r17, %r18 diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 738cd31b1a0..7f834996f18 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -359,6 +359,7 @@ run_dump_test "x86-64-apx-cfcmov-intel" run_dump_test "x86-64-apx-pushp-popp" run_dump_test "x86-64-apx-pushp-popp-intel" run_list_test "x86-64-apx-pushp-popp-inval" +run_list_test "apx-nci-ndd-nf" "-almn" run_dump_test "x86-64-avx512dq-rcigrd" run_dump_test "x86-64-avx512dq-rcigrne" run_dump_test "x86-64-avx512dq-rcigru" diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index ab3de7f38d2..6da7d1bf5f2 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -305,6 +305,8 @@ static const dependency isa_dependencies[] = "APX_F" }, { "APX_NF", "APX_F" }, + { "APX_NCI_NDD_NF", + "APX_NCI|APX_NDD|APX_NF" }, { "PadLock", "FXSR" }, { "PadLockRNG2", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index c81771ed715..564dbb1918c 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -2119,6 +2119,17 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ 0, 0, 0 } } +#define CPU_APX_NCI_NDD_NF_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ + 0, 0, 0 } } + #define CPU_ANY_FXSR_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, \ 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \