From: Paul Kocialkowski Date: Mon, 7 Jul 2025 16:51:54 +0000 (+0200) Subject: arm64: dts: allwinner: a100: Add EMAC support X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4e3be5629f1f6de30d3fbcdc357e7da948ccf698;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: allwinner: a100: Add EMAC support The Allwinner A100/A133 Ethernet MAC (EMAC) is compatible with the A64 one and needs access to the syscon register for control of the top-level integration of the unit. Note that there are two such controllers on the sun50iw10 die, which are the same unit with a different top-level syscon register offset. Signed-off-by: Paul Kocialkowski Reviewed-by: Andre Przywara Link: https://patch.msgid.link/20250707165155.581579-4-paulk@sys-base.io Signed-off-by: Chen-Yu Tsai --- diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 7d5be0975371..bb5f9e4f3d42 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -420,6 +420,26 @@ #size-cells = <0>; }; + emac0: ethernet@5020000 { + compatible = "allwinner,sun50i-a100-emac", + "allwinner,sun50i-a64-emac"; + reg = <0x5020000 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; + syscon = <&syscon>; + status = "disabled"; + + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + ths: thermal-sensor@5070400 { compatible = "allwinner,sun50i-a100-ths"; reg = <0x05070400 0x100>;