From: Ulrich Drepper <drepper@redhat.com>
Date: Sat, 14 Mar 1998 09:10:17 +0000 (+0000)
Subject: Remove selection of instruction set here.
X-Git-Tag: cvs/before-sparc-2_0_x-branch~66
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4ec33ffc4814b03eb9f3b622fdbbffa566207c6b;p=thirdparty%2Fglibc.git

Remove selection of instruction set here.
---

diff --git a/sysdeps/unix/sysv/linux/alpha/ioperm.c b/sysdeps/unix/sysv/linux/alpha/ioperm.c
index 87a8ec0510f..70186f4f775 100644
--- a/sysdeps/unix/sysv/linux/alpha/ioperm.c
+++ b/sysdeps/unix/sysv/linux/alpha/ioperm.c
@@ -32,12 +32,6 @@
    sparse address space would work (e.g., the Low Cost Alpha chip has an
    I/O address space that's 512MB large!).  */
 
-/* The TSUNAMI support below requires the use of real BWX insns.
-   Tell the assembler that such are available.  This requires
-   binutils 2.8.1.18 or later.  */
-
-asm(".arch ev6");
-
 #include <errno.h>
 #include <fcntl.h>
 #include <stdio.h>