From: Richard Zhu Date: Mon, 29 Jul 2024 20:18:16 +0000 (-0400) Subject: dt-bindings: PCI: imx6q-pcie: Add i.MX8Q PCIe compatible string X-Git-Tag: v6.12-rc1~96^2~13^2~2 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4f1e478f75e9818983ce30b98ca6d2d8182952eb;p=thirdparty%2Fkernel%2Flinux.git dt-bindings: PCI: imx6q-pcie: Add i.MX8Q PCIe compatible string Add i.MX8Q PCIe "fsl,imx8q-pcie" compatible strings. clock-names align DesignWare Cores (DWC) common naming convension. Link: https://lore.kernel.org/linux-pci/20240729-pci2_upstream-v8-9-b68ee5ef2b4d@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Frank Li [kwilczynski: commit log] Signed-off-by: Krzysztof WilczyƄski Reviewed-by: Manivannan Sadhasivam Reviewed-by: Rob Herring (Arm) Acked-by: Conor Dooley Acked-by: Manivannan Sadhasivam --- diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 8b8d77b1154b5..1e05c560d7975 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -30,6 +30,7 @@ properties: - fsl,imx8mm-pcie - fsl,imx8mp-pcie - fsl,imx95-pcie + - fsl,imx8q-pcie clocks: minItems: 3 @@ -184,6 +185,21 @@ allOf: - const: pcie_bus - const: pcie_aux + - if: + properties: + compatible: + enum: + - fsl,imx8q-pcie + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: dbi + - const: mstr + - const: slv + unevaluatedProperties: false examples: