From: Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Tue, 28 Oct 2014 21:41:26 +0000 (+0100)
Subject: pinctrl: sunxi: Add PN bank base pin
X-Git-Tag: v3.19-rc1~128^2~12
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4f6bd5cfc6c8f2e8c2c38fdfea8e32f9a463cdbb;p=thirdparty%2Flinux.git

pinctrl: sunxi: Add PN bank base pin

The A80 R-PIO controller has one more bank that what we've seen so far, add the
PN pin bank.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---

diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index 4245b96c79964..5a51523a34599 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -27,6 +27,7 @@
 #define PI_BASE	256
 #define PL_BASE	352
 #define PM_BASE	384
+#define PN_BASE	416
 
 #define SUNXI_PINCTRL_PIN(bank, pin)		\
 	PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)