From: Fabiano Rosas Date: Fri, 18 Feb 2022 07:34:14 +0000 (+0100) Subject: target/ppc: cpu_init: Avoid nested SPR register functions X-Git-Tag: v7.0.0-rc0~48^2~22 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4ffb8c5e434195ce1d8a6bc148e6f4971d089258;p=thirdparty%2Fqemu.git target/ppc: cpu_init: Avoid nested SPR register functions Make sure that every register_*_sprs function only has calls to spr_register* to register individual SPRs. Do not allow nesting. This makes the code easier to follow and a look at init_proc_* should suffice to know what SPRs a CPU has. Signed-off-by: Fabiano Rosas Reviewed-by: David Gibson Message-Id: <20220216162426.1885923-6-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater --- diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index c6db87fd5c7..53409a176ac 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -1128,8 +1128,6 @@ static void register_BookE206_sprs(CPUPPCState *env, uint32_t mas_mask, break; } #endif - - register_usprgh_sprs(env); } /* SPR specific to PowerPC 440 implementation */ @@ -1427,7 +1425,6 @@ static void register_405_sprs(CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, spr_read_generic, &spr_write_generic, 0x00000000); - register_usprgh_sprs(env); } @@ -2318,6 +2315,7 @@ static void init_proc_405(CPUPPCState *env) { register_40x_sprs(env); register_405_sprs(env); + register_usprgh_sprs(env); /* Bus access control */ /* not emulated, as QEMU never does speculative access */ spr_register(env, SPR_40x_SGR, "SGR", @@ -2947,6 +2945,7 @@ static void init_proc_e200(CPUPPCState *env) 0x00000000); /* Memory management */ register_BookE206_sprs(env, 0x0000005D, NULL, 0); + register_usprgh_sprs(env); spr_register(env, SPR_HID0, "HID0", SPR_NOACCESS, SPR_NOACCESS, @@ -3294,6 +3293,7 @@ static void init_proc_e500(CPUPPCState *env, int version) env->spr[SPR_PVR]); } register_BookE206_sprs(env, 0x000000DF, tlbncfg, mmucfg); + register_usprgh_sprs(env); spr_register(env, SPR_HID0, "HID0", SPR_NOACCESS, SPR_NOACCESS,